Senior Design Verification Engineer Job Description
Senior Design Verification Engineer Duties & Responsibilities
To write an effective senior design verification engineer job description, begin by listing detailed duties, responsibilities and expectations. We have included senior design verification engineer job description templates that you can modify and use.
Sample responsibilities for this position include:
Senior Design Verification Engineer Qualifications
Qualifications for a job description may include education, certification, and experience.
Licensing or Certifications for Senior Design Verification Engineer
List any licenses or certifications required by the position: NI, ISTQB
Education for Senior Design Verification Engineer
Typically a job would require a certain level of education.
Employers hiring for the senior design verification engineer job most commonly would prefer for their future employee to have a relevant degree such as Bachelor's and Master's Degree in Computer Science, Electrical Engineering, Computer Engineering, Engineering, Electronics, Science, Design, Education, Physics, Technical
Skills for Senior Design Verification Engineer
Desired skills for senior design verification engineer include:
Desired experience for senior design verification engineer includes:
Senior Design Verification Engineer Examples
Senior Design Verification Engineer Job Description
- Interact with internal IP developers to help ensure high quality, highly implementable IP
- To contribute to peer reviews and quality inspections
- Contribute on the system definition and development of a wide range of products
- Take ownership as interface to the digital, software and analog development from system specification until verification
- Define and follow up mixed signal verification plans, and develop efficient test-benches for verification of high complex IC’s on model and transistor level
- Set up top level schematic (analog and digital) of integrated circuits including modeling of building blocks
- Work together with the Characterization Engineer to perform lab evaluation and validation of IC’s, and collaborate with the Test Engineer to ensure that the design can be tested efficiently
- Take the technical lead for a small group of mixed signal design engineers on project level
- Architect block or system level design specifications from marketing and/or system requirements
- Perform mixed-signal block & system
- Familiarity with audio test equipment, Audio precision, Head Acoustics, B&K
- Assesses proposed component features to help determine cost-effectiveness and feasibility
- Provides input to system architects in shaping and formalizing component roadmaps, resource needs, and milestones
- Provides input in shaping and formalizing component roadmaps, resource needs, and milestones
- Present design decisions in a constructive and professional way before peers and direct management
- May interact directly with customers as required
Senior Design Verification Engineer Job Description
- Perform FPGA emulation & prototyping
- Conduct design tradeoff analysis – die area, dynamic power, leakage, schedule, resource, priority
- Strong C (develop diagnostics) and Familiar with low level (driver) programming
- HW debug capability
- Automation ( HDMI video capture, audio capture, Transport stream add-on card
- Develop functional diagnostics with C programming skill to root cause issue, resolve issue, and most important to close tasks
- In charge of 3-4 modules modules diagnostics/verification across Veloce/FPGA/ASIC platforms
- Develop quality, timely and cost effective solutions independently
- Architect the testbench and develop in UVM or Formal based verification approaches
- Work with design team in generating test-plans and closure of code and functional coverage
- 7 years of experience in the area of DSP/vector processors, SIMD/GPU/CPU
- Prior experience with protocols such as AXI,APB,AHB
- Familiarity with EDA tools for simulation, debugging, coverage analysis, CDC, LINT
- Proficiency with C/C++ programming language and hands-on exposure to Object Oriented Programming is a big plus
- Ethernet experience specially at the PHY layer is a big plus
- Highly self-motivated with the ability to effectively work alone in a team
Senior Design Verification Engineer Job Description
- Software implementation of Battery control algorithms
- Provide technical assistance to team and lead software development and verification activities
- Construction of product IO rings using established flows and scripts
- Delivery of all needed waivers(ERC/DRC/EDRC/PERC) and documentation to SoC teams
- Facilitate ESD and design reviews for 3rd party IPs and IO ring
- Tracking of IP versions, visual inspections and in-context XOR verifications
- Continuously improve the verification environment and methodologies, while ensuring the highest degree of quality by applying industry leading methodologies
- Develop validation content like test benches, test generators, formal proofs and automation tools to accelerate execution Influence and contribute to post-silicon validation focus and sighting resolution
- Create and execute SoC testplan including data-path, virtualization, security, power management
- Implement directed and random test cases and TB in C++/UVM, checkers and assertions
- BSEE or MSEE/ECE degree with 5-10 years functional verification experience in complex IP/SubSystem/SoCs in RTL and at gate level
- Hands on experience using an industry standard verification methodology (UVM/AVM/VMM)
- Experience in writing and debugging SystemVerilog Assertions (SVAs)
- Ability to understand project specifications and come up with a comprehensive set of requirements and develop verification test-plans
- Able to program/debug in C and Assembly languages
- Excellent communication skills both verbal and written for documentation and reporting
Senior Design Verification Engineer Job Description
- Write & Review IP-Level/SOC-Level test plan with global team and Implement the plan to drive verification closure
- Develop/Apply Functional coverage code and drive coverage closure
- Accountable for project delivery
- Construction of product I/O pad rings using established flows and scripts
- Understand ISP hardware architecture and functional block being designed
- Build C/C++ model for simulation, build test bench and monitors for block test environment
- Participate in block level and IP subsystem level verification work, simulate and debug the codes in coding stage
- Compose ASIC specific part of test plan, work with algorithm, firmware and FPGA engineers to prove functional correctness from block level to IP subsystem level
- Support camera SW, FW and diagnostics team for pre-silicon and post-silicon debugging
- Collaborate and interface with local and global management to make accountable deliverables on time
- Team player, inquisitive and self-motivated individual
- 10+ years of experience in complex IC verification and/or IC design preferred
- Familiar with analog/digital simulation tools, ie
- Strong English skill in both writing and speaking is a must
- MSEE/CS/CE plus 7 years, or BSEE/CS/CE plus 9 years, equivalent experience in ASIC design and verification
- Hands on design verification experience of gigabit Ethernet is a plus
Senior Design Verification Engineer Job Description
- Own and drive improvements to our build, simulation, continuous integration, release scripts, tools, and process
- Bring new automation technologies to improve our existing flow and add new tool set for new emerging designs
- Technically coordinating verification and approval testing of Solar inverters
- Controlling electrical installations in testing laboratories
- Keeping abreast of the technical requirements for certification and approval testing
- Working hands in testing together with other design and verification engineers
- Provide verification support to design projects by simulating, analyzing and debugging pre-silicon chip designs
- Develop patterns and regressions to increase the functional coverage for all DRAM architectures and features
- Develop and maintain test benches and test vectors using digital and analog simulation tools
- Co-work with international colleagues on developing new verification tools and flows to take on the verification challenges in DRAM design
- Requires proven track record in technical leadership and mentoring
- Expert knowhow in pre-silicon verification, understanding of various methodologies formal verification, constrained-random verification, UVM methodology, coverage driven verification, the ability to apply appropriate methods for given challenges and hands-on experience
- Fluent in C and C++ and scripting languages
- Experience using industry standard simulation/design verification tools and methodologies (UVM/OVM)
- Several years of experience in designing or testing frequency converters
- Good spoken and written skills in English and Finnish