Verification Engineer Resume Samples

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A Shanahan

Amara

Shanahan

2509 Kuphal Mountains

Boston

+1 (555) 382 9109

2509 Kuphal Mountains

Boston

Phone

p +1 (555) 382 9109

Experience Experience

Dallas, TX

Verification Engineer

Dallas, TX

Fisher, Kutch and Corwin

Dallas, TX

Verification Engineer

Develops functional validation workbooks for performing site-to-site failover, workload redistribution, recovery, and fail-back
Develop and execute test-plans for verifying correctness and performance of the design
Participate in continuous improvement activities by supporting the implementation of process and product quality improvement initiatives
Develop an intimate knowledge of design and goals to create deterministic test cases
Team / personal development – You take time to drive your own development, while also encouraging team members and partners to do the same
Provides input on the development of design, implementation, user guides, and training materials
Work with design and micro-architecture team to develop the verification environment and test plan

Dallas, TX

Senior Verification Engineer

Dallas, TX

Wilkinson and Sons

Dallas, TX

Senior Verification Engineer

Perform bench level tests, create reports, create defects and review them with the Verification Project Lead
Working closely with RTL designers to specify, develop and debug constrained-random and directed testcases towards coverage driven verification closure
Team and personal development – You take time to drive your own development, whilst also encouraging team members and partners to do the same
Understand and execute our software development process
Track and monitor key customer metrics and provide management regular updates
Architect and Create verification environments using Systemverilog and Universal verification methodology-UVM for networking chips
Working knowledge in one or more of the following: Processor architecture, Networking, SOC components, SOC inter-connect busses and memory interfaces

present

Chicago, IL

Principal Verification Engineer

Chicago, IL

Muller Group

present

Chicago, IL

Principal Verification Engineer

present

Develop and execute assertion based verification plans for critical blocks
Property checking / Behavioral model development
Develop test plans and execute tests for SoC peripheral interface and accelerator IP’s
Verification test bench development and implementation
Architecting verification IP and full verification environments – developing test benches to ensure the timely sign-off of our designs
Develop tests and tune the environment to achieve coverage goals
Working knowledge of on chip interconnect protocols such as AXI/AHB/APB and OCP

Education Education

Bachelor’s Degree in Electrical Engineering

Hofstra University

Bachelor’s Degree in Electrical Engineering

Skills Skills

Solid knowledge of adaptive control theory highly desirable
Strong understanding of basic computer architecture
Good knowledge of verification methodologies
Excellent written and spoken communication skills, professional approach to work and willingness to accept new challenges
Basic knowledge of HVL, coverage, scripting
Strong knowledge of digital design
Good knowledge of Linux and Solaris is added advantage
Strong understanding of quality assurance practices and testing methodologies
Ability to work in a dynamic, fast paced team environment and utilize others in the organization to deliver quality products
Good knowledge of Test tools and Test environment

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15 Verification Engineer resume templates

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Verification Engineer Resume Examples & Samples

FE digital design including RTL, mixed-signal modeling and simulation, and verification
Development of behavioral modeling
Synthesis and Static Timing Analysis and timing closure
Expertise that is directly applicable to analysis and design of power distribution network in System-on-Chip products in small geometry processes (<28nm)
Knowledge of top level design and verification methodologies
Solid knowledge of adaptive control theory highly desirable
Equivalent of Bachelor of Science Degree (Master's degree or higher preferred)

Opc / orc Development & Verification Engineer Resume Examples & Samples

You should possess general software coding skills, UNIX/Linux experience and a desire to learn. Calibre SVRF / DRC coding, Semiconductor process knowledge, EDA software or physical verification experience are beneficial
Basic experience in shell scripting (Perl, Tcl, ksh, etc.)
Experience in DRC code writing and testing (Calibre SVRF, Hercules, Dracula, Niagara, Quartz, etc.)
Basic knowledge in EDA Software expertise, especially design layout
Basic knowledge of Semiconductor design and/or manufacturing
Basic knowledge of design rule development process
Basic knowledge of Dataprep software development (OPC, ORC, Fill shapes, mask fracture, etc.)
At least 2 years experience in Semiconductor Device, Process knowledge
At least 2 years experience in Mentor Calibre SVRF, DRC Coding
At least 2 years experience in Unix/Linux basics, scripting/software languages Tcl, Shell, Perl, Java

Pre-silicon Verification Engineer Resume Examples & Samples

Candidates must possess a minimum of a Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science
Minimum of 3+ months experience in principles of software engineering & object oriented programming
Minimum of 3+ months experience in architecting and coding System Verilog/OVM test benches and in designing test benches for reuse
Familiarity in PCIe protocol and knowledge of one or more of the following interfaces DDR3/4, GbE, JTAG, I2C, SATA, SMBus, SPI, USB2/3

RTL Verification Engineer Resume Examples & Samples

6+ years' experience in ASIC logic verification
6+ years' experience programming in an object oriented language such as System Verilog C++ and/or Specman
6+ years' experience with RTL simulators
6+ years' experience debugging in RTL

VPG HW Pre-si Verification Engineer Resume Examples & Samples

5+ yrs working experience should be related to the following areas
Strong background in digital design, ASIC design flow and computer architecture
Experience with programming/scripting languages like C/C++, Perl, Ruby, Python, and Unix (Linux)
Experience with hardware description languages (such as VHDL, Verilog, System Verilog)
Skills pertaining to pre-Si validation, including expertise in: logic simulators (Modelsim, VCS), Functional coverage concepts and implementation,
Familiarity with 3D Graphics pipeline is a plus
Technical team leading experience is preferred

RF Component Verification Engineer Resume Examples & Samples

Understanding TX transceiver specification
Development of post silicon verification test plans in order to meet team goals and resolve problems timely
Support preparation of the complete test suite (RF measurement setup, chip control, PCB design, ...)
Programming automated test cases for characterization & optimization of TX performance parameters. Judging according specification
Conduct tests autonomous and also have ability of instructing other team members
Bring up of TX architecture in laboratory, pro-active interacting with other engineering teams required (like system, circuit design, software, firmware ..)
Analyse & root cause identification for issues encountered during tests. In the following elaborating ideas in team for possible HW/SW solutions or workarounds
Prepare and present status, plan tracking & updates
Graduate (BS/MS/PhD) in Electrical Engineering
Candidate should have 5+ years of related experience in SoC post silicon verification
Cellular RF(2G/3G/4G) expert for RF interface & modulation
Insights in digital signal processing of modern transmitters (multi rate systems, filtering, noise shaping, ...)
In depth knowledge of analog RF-TX architecture and cross effects (mixer, amplifier, PLL, control loops, ...)
Experienced with RF laboratory equipment (SA, NWA, Power Meter , ... )
Excellent troubleshooting, analysis and problem solving skills
Programming skills: MATLAB Script Language expert / C ++ basic skills
Good team spirit and enjoy working with new challenges
English Fluent / German optional

SW Verification Engineer Resume Examples & Samples

4 years of C, C++, python test development, configuration management, and debug experience
4 years of experience with Intel Architecture
2 years of experience with the device level programming with Linux Operating System

IP Verification Engineer Resume Examples & Samples

Generating focused and random test cases, analyzing coverage and debugging failure cases
Writing software to provide controllability and observability into the architectural model
Analyzing microarchitectural features to identify possible problem areas
Previous experience in pre-silicon or post-silicon validation/verification (preferred)
Programming experience in C++, Perl and Assembly

Senior Verification Engineer Resume Examples & Samples

1) Experience with low-power design and verification techniques, concepts supported by the UPF/CPF languages
2) Working with low power EDA tools with VCS-NLP, Questa-PA, MVSIM. Knowledge of current generation power-aware simulation tools from Mentor, Synopsys or other solutions
3) Verification using VCS-NLP and Questa PA , expertize in verification of the low-power cells used in the low power SoC (level shifters, isolation cells, retention flip-flops, power switches) are used correctly
4) Development and execution of low-power verification test plan
5) Power-aware simulations of complex CPU-core/subsystems/SoC fullchip
6) Power-aware verification in RTL & Netlist (PG-pins simulation) , good understanding of Power estimation with PT-PX or any industry standard power estimation tools ,Must understand & previously worked on Power estimation flows in mobile-SoC
1) Strong background in SoC verification using C, System-Verilog, Specman, VHDL/Verilog , SVA
2) Typically requires at least 5-7 years of experience in SoC Low power verification
3) Must be very experienced with Synopsys VCS NLP or QuestaPA
4) Good understanding of low-power SOC design principles & UPF
5) Experience with Verdi debugger highly desirable
6) Scripting abilities in PERL, TCL or Python is a plus
7) Good communications skills & working with multiple cross functional teams
BE,B-Tech,MS,M-Tech from reputed institution in Electrical & Electronics or equivalent

Senior Verification Engineer Resume Examples & Samples

B.Sc / M.Sc degree in Electrical Engineering, Computer Engineering or Computer Science
At least 1 years of experience in RTL coding/debug related position: Verification/Validation/Design
Good multi-tasking skills
Team-player, great communication skills

Digital Verification Engineer Resume Examples & Samples

Responsible for the pre-silicon functional verification of complex digital designs
Implementation of functional verification environments (Test benches)
Development of test plans & test cases
Implementation of checkers, random test generators, high level transactional models and bus functional models (BFMs)
Performing simulation, random and focused stimulus generation and coverage analysis
Develop architecture and micro-architecture knowledge of the complex digital design block(s) under test
Experience of position within industry
Background in the pre-silicon verification of complex ASIC, SoC or FPGA designs
Proven track record of successful first time delivery of projects
Experience with industry standard development and verification tools and methodologies
Experience with OVM/UVM and System Verilog
Experience with formal verification, System Verilog Assertions, code and functional coverage implementation and analysis
Experience with languages such as SystemC, C++, Perl, TCL, Shell scripting
Experience with high speed I/O such as PCI Express and Gigabit Ethernet
Experience with switching/routing and communications protocols such as Ethernet

Senior SoC Verification Engineer Resume Examples & Samples

Defining and developing OVM SystemVerilog-based validation environments and test suites
Defining and running regressions, and triaging regression failures and do coverage analysis
Interacting with architects and RTL design engineers in the definition of the validation environment and plan as well as resolution of simulation failures
Knowledge of SystemVerilog Testbench & Assertions is must
UVM/OVM experience is must
Low power verification flows
Knowledge of computer architecture, Protocols like USB, PCIE, DDR, flash, SRAM, eMMC, SDIO, UART, I2C
Formal Property Verification using SystemVerilog Assertions

Senior Pre-si Valid / Verification Engineer Resume Examples & Samples

Validating designs at block or full-chip level by authoring validation plans, writing focus tests, creating templates defining coverage strategies, developing and analyzing coverage monitors, creating event injectors, writing architectural and micro-architectural correctness checkers, developing BFMs (Bus Functional Model), running functional simulations, and debugging failures
Experience with microarchitecture verification, highly desired
Knowledge of analog and basic circuit design
Knowledge of memory protocol
Knowledge of validation methodology and tools, including OVM, UVM, eRM, VMM, desired

System Verification Engineer Resume Examples & Samples

Creation and Execution of the Weekly Release Tests
Functional Release Test (FRT),
Current Drain Measurement (CDM)
Maximum Data Throughput Measurements (MDTP),
Meantime between Failure testing (MTBF) including failure analysis and error tracking
Interprocessor Communication Test Suit
Definition, creation and modification of test scripts
Work closely with other members of SW development team, Architects and Customer Teams to debug and solve issues
Key interface between customer engineering teams and Intel engineering teams to triage issues, prioritize and ensure effective close out of issue
Execute Power on Exit Criteria Test Cases for Modem Bring up

DFT / Verification Engineer Resume Examples & Samples

Strong written / verbal communication skills are a must, as you will be working, influencing and collaborating with both internal/external design teams
Ability to work well in a diverse team environment
5+ years of experience with Intel Front-End Tools and Validation Methods
5+ years of hands-on experience with State-of-the-Art and Industry-Standard Dynamic Verification Tools, Requirements, and Applications like VCS/VCS-MX, Specman, Formal Verification Tools and Flows
5+ years of experience in DFx Techniques & Methodologies

Senior Pre-silicon Verification Engineer Resume Examples & Samples

3+ years of experience architecting and coding complex System Verilog/OVM test benches at the cluster (IP) level, at super-cluster (multi-IP) level, and/or full-chip level
3+ years of experience in test planning at the cluster, super-cluster, and/or full-chip level is required, with a proven track record of multiple successful product releases
3+ years of experience with principles of software engineering, object-oriented programming, and in test bench design for re-use and integration into complex SoCs
Familiarity with PCIe is preferred, and knowledge of one or more of the following interfaces would be a plus: DDR3/4, GbE, IDI, FSB, JTAG, I2C, SATA, SMBus, SPI, USB2/3
Prior experience at Intel in pre-silicon validation domain will be a plus
A demonstrated ability to work with multiple teams across a wide range of disciplines is preferred

Verification Engineer Resume Examples & Samples

Administration experience with HP ALM/QC
Programming experience with VBScript, VBA, Perl, using OTA-API and REST-API
Being familiar with Microsoft Excel, XML
Database knowledge, SQL
Experience with QC version 11.0 and/or 12.0
Telecommunications/Mobile communications background
More than 3 years working experience in system verification

Reliability Verification Engineer Resume Examples & Samples

Working closely with CAD and Design engineers to understand and develop specifications for implementing flows that meet the requirements of the specs
Provide productive and efficient methods to solve design and automation problems as they arise
Develop methodologies for design flows
Drive innovation and initiatives to enhance existing automation, tools and methodologies to meet the evolving needs of our customers
Good understanding of process technologies and ability to intelligently interact with process developers is highly desirable
Experience with industry standard tools in RV is highly desirable

Pre-si Verification Engineer Resume Examples & Samples

Strong SOC/CPU microarchitecture and/or system level skills with five to seven years of pre-si verification background
Experience with logic design and validation tools and methodologies including: Verilog, System Verilog, OVM/UVM, Synopsys VCS
Familiarity of power management flows
Knowledge of assertion based languages and/or methodology and C/C++ would be an added advantage
Knowledge of emulation platforms a plus
Experience in automation using Perl is desirable
Demonstrate capability to ramp on any Industry standard device protocols and architecture
Need to have demonstrated excellence in problem solving and resolution through innovative methods in environment/tools capabilities, test plan and test development, debug, automation, etc

Pre-silicon Verification Engineer Resume Examples & Samples

Education: Engineers should possess a BSC or MSC degree in Electrical Engineering, Computer Engineering, Software Engineering or Computer Science
Fast and independent learning capabilities
Strong analytical ability, problem solving and communication skills
Experience: 2-4 years working in VLSI design and/or verification, developing Register Transfer Level (RTL) validation environment

Functional Verification Engineer Resume Examples & Samples

Ownership of a piece of our test bench(block or features or methodology improvement),
Planning & execution of Verif test plans for UMC IP changes,
Bug fixes,
Debug of regression signatures and
Integration and re-use continuous improvements towards Verif IP Xact standards
BS + 5 or more yrs of Verification experience or MS +3 or more years
Master's Degree highly highly preferred
Experience or exposure to Verilog, System Verilog, Object Oriented Programming/C++ or UVM,

Verification Engineer Resume Examples & Samples

Develop Test Artifacts (i.e. Test Plans, Test Suites, Test Cases, Test Parameters, Test Objectives, and Test Sessions) as required to execute ECU level as well as System level Real Time Controls SW Testing of the ePUMP products
Review the ePUMP Application, Controls and SW SRS Requirements to design and develop the Test Artifacts
Execute “hands-on” controls testing (signal level/power level) for the ePUMP products using the appropriate test systems at ECU level as well as System level
Provide input to Systems and Software teams on missing/deficient controls requirements identified while developing Test Artifacts, industry best practices, controls experience and/or controls test execution
Co-Develop the controls requirements with Systems and Software teams through testing
Lead Controls Test Execution Outputs (i.e. Defects, Data Plots, Reports etc.) discussions with the cross functional teams
Lead/Execute “hands-on” debugging of controls issues/performance analysis / demonstrations on test bench involving cross functional teams / management / customer. Use Scopes, logic analyzers, power analyzers etc. test equipment “hands-on” to successfully execute such tasks
Understand/Visualize / Draw / Explain Controls Systems sub-system interfaces such as Back-EMF patterns, transients etc. to other Verification and cross functional team members
Ability to understand, explain, apply standard control theory concepts such as but not limited to “FEED FORWARD”, “PID”, “CURRENT CONTROL”, “SPEED CONTROL”, “TORQUE CONTROL”, “OPEN/CLOSE LOOP CONTROLS” etc
Understand the mechanical, electrical, thermal, fluid interactions between motor/pump/pcb/software etc. during controls systems testing
Execute tests and co-relate data/product behavior from various test systems such as SMART Load Box for Controls, HIL, Dynamometer, Fluid Test System etc
Design and Develop Controls Test System SW (i.e. Plant Models, Loss Models, and Closed Loop Control Algorithms etc.) and HW components as required to safely auto-test ECUs and systems
Compare results of simulation side by side with results from software system under test
Identify and root-cause deficiencies; provide results and suggestions to software author
Design, Develop, Commission and Deploy world class HILs, SMART Load boxes, Dynamometers and associated infrastructure using technologies such as but not limited to Matlab, Simulink, dSPACE etc. to test both ECU-Level and System-Level controls requirements
Support test infrastructure electrical and mechanical aspects development such as Carrier boards / Load boards for signal conditioning, load mounting, fixturing, plumbing, manual/electronic flow control, temperature, flow rate, viscosity etc. sensors and actuators in partnership with V&V and cross functional teams
Support the selection and design of new equipment and custom Test Properties
BSEE required, MSEE/MS Software Engineering/MS Controls Engineering or related field desired
Experience with Automotive Real Time Controls System Development/Testing required
Experience with one or more of Matlab/Simulink, State flow, EMAG, dSpace, Electrical Circuit Design aspects
Experience with CAN, LIN and other automotive networks and related tools
Hybrid, Hydraulic(e.g. Water/Oil/Vacuum/Scavenging etc. automotive pumps) or ECU(e.g. Body/Chassis/Telematics/ADAS Systems etc.) product/test experience desired

IP Verification Engineer Resume Examples & Samples

Research and/or development experience in one or more of the following areas
Mixed-signal verification and test on advanced technologies
Knowledge on PCIE, Ethernet or High Speed Serdes is a plus
High performance computing system, processor, chipset and ASICs

Analog Macro Ip Verification Engineer Resume Examples & Samples

Receive hybrid Analog/Digital Macro Designs from external companies
Review Macros using available tools
Make available Macro designs for integration by ASIC Chip Integration teams
Debug Analog/Digital design issues detected
Communicate with external company the error using details and test cases
Follow Business and clear communication style
Track solution resolution with external company and make available needed macro IP fixes to ASIC Chip integration teams
Discuss urgency of fix with ASIC Chip teams and if needed and possible, propose/negotiate work around to minimize schedule delays if the external company solution will take longer than the chip design schedule can accept
Discuss and work with the larger team of multi-disciplinary engineers to share workloads
Improve and promote communication, teamwork, problem solving, mentoring and training

Verification Engineer Resume Examples & Samples

Preparation of the node/network configuration for the test (building up the neccessary HW configuration in the Lab)
Preparation of the test specification by designing new test cases
Experience in Unix and/or Linux environment
Experience in shell scripting
Pro-activity

Rbs Verification Engineer Resume Examples & Samples

Develop and maintain test tools and test environment
Analyze product requirement and feature, create test cases
Setup test environment and execute test cases
Analyze test result and generate test report
Work closely with other R&D departments in Sweden and Canada
Customer on-site support
High Execution/Delivery ability, deliver on time and commitments and constantly work on efficiency improvements
Perseverance,dig into the detail of every problem and never give up
Work alone some times

System Verification Engineer Axd Resume Examples & Samples

Participation in software maintenance
Setup and maintain test environment, test equipment
Perform Troubleshooting
Verify corrections
Design and execute test cases
Secure high product quality
BSc Degree in Electrical Engineering or Computer Science

Vlsi Verification Engineer Resume Examples & Samples

Bachelor's Degree in Electrical Engineering is required, Master’s degree preferred
Must have 6 to 10 years of experience performing design verification of complex VLSI and/or FPGA blocks
Ability to develop comprehensive test plan documentation to fully verify design modules
Experience creating bus functional models, bit accurate computation models, transaction monitors
Experience with directed and random testing methodologies
Experience with black box and white box testing
Analysis and improvement of functional simulation code-coverage
Clearly documenting test failures using bug tracking software
Diagnosing test failures and assisting Designers with debug
Creating and maintaining test regression suites
Experience with Verilog, System-Verilog, VCS, shell/Perl scripting
Ability to travel domestically and internationally if needed
Experience with Synopsys OVM/UVM based verification
Experience with DFT, BIST, scan, JTAG

PDK Enablement Development & Verification Engineer Resume Examples & Samples

Direct experience in process design kits development & verification
Semiconductor device knowledge
Experience in EDA tools Cadence Virtuoso, Mentor Calibre
Experience in Physical verification flow using Calibre/Assura
Experience in Design Rule Check regression
At least 6 months experience in Cadence Virtuoso, vendor tool knowledge
At least 6 months experience in Semiconductor device,process knowledge
At least 6 months experience in Unix/Linux basics, scripting language
At least 6 months experience in Custom physical Layout
At least 6 months experience in Calibre SVRF / DRC coding

Verification Engineer Resume Examples & Samples

Develop Test Plans, Test Cases, Test Parameters, Test Objectives, and Test Sessions, Test as required to execute SW Black Box, Module, System Integration and System level testing. Use the corporate TEST MANAGEMENT tool for all test planning and execution tasks
Execute testing at bench level using various test systems such as but not limited to HILs, SMART Load Boxes, various DRY/WET test systems developed for ePUMP projects, Thermal Chambers etc
Perform hands on testing comprehensively using the test systems and associated infrastructure such as but not limited to scopes, meters and other electromechanical devices
Systematically store test data and generate test results, reports to be reviewed within Verification team as well as cross functional teams
Systematically generate and assign defects to appropriate stake holders. Lead and support defect analysis and debugging with Technical project lead and cross functional team members as required through graph, plots, data analysis and presentations of test outputs to customers
Be hands on self-starter that takes initiative in differentiating/debugging issues related to test systems and support the test infrastructure team in root cause analysis as well as proposed solutions to fix the test systems
Design, Develop and Execute Test Artifacts and Testing as required for ADAS products using test benches and vehicles
Support new project quotation development activities as required
Work alongside and with an opportunity to be mentored by fellow team members developing the hardware and software aspects of such test properties following the common/reusable architecture strategy
Work closely with Electrical Hardware engineers, Software Development Engineers, Software Verification Engineers and System Engineers to continuously evolve Test Properties as needed

Verification Engineer Resume Examples & Samples

Execute testing at bench level and In Vehicle testing as required
Drive the vehicle to perform required testing, collect data and create reports
Correlate simulated Test Results with Real-World data in efforts to improve Plant Models, Loss Models, etc
5 years or more experience with automotive or other applicable domains product development/testing experience required
Experience with one or more of Matlab/Simulink, dSpace, Electrical Circuit Design aspects

Verification Engineer Resume Examples & Samples

Design, Develop, Commission and Deploy world class HILs, SMART Load boxes, DRY and WET/FLUID Test Systems and associated infrastructure using technologies such as but not limited to Matlab, Simulink, dSPACE etc. to test both ECU-Level and System-Level Functional requirements for various projects
Support the Selection, Design and Development of test infrastructure electrical and mechanical aspects such as Carrier boards/Load boards for signal conditioning, load mounting, fixturing, plumbing, manual/electronic flow control, temperature, flow rate, pressure, viscosity etc. sensors and actuators for WET Test Systems
Support the Selection, Design and Development of test equipment such as Electromagnetic Brakes, Motors, Mechanical Fixtures, and Shafts etc. to create the DRY test setups required for ePUMP testing. Work with technicians in the EE lab and Machine shop to generate the test systems and commission them for functionality
Interface the DRY and WET test setups with the ePUMPS/ePUMP Motors and test system control electronics such as HILs, Microautobox etc. Support the complete commissioning of these DRY and WET Test systems
BSEE / ME required, MSEE / ME desired
Experience with OIL/WATER etc. based FLUID test systems development for Engine/Transmission testing involving test setup design with Thermal, Air Flow, Pressure, Vacuum etc. features desired

Verification Engineer Resume Examples & Samples

4 - 6 years of relevant experience
Ericsson Charging System product knowledge
Good knowledge of Test tools and Test environment
Understanding in: Interoperability Testing with device vendors, SoapUI, Selenium
Proficiency in Testing: Java, TTCN, Linux, application developed in Corba and Oracle Times Ten
Exposure to TTCN scripting
Must have good aptitude for Quality Assurance – Verification
Telecom Domain background, esp. pre-paid charging domain, SS7 would be preferred
Sound knowledge of Packet core of Ericsson
Sound knowledge of SS7/SCTP/SIGTRAN/Diameter/GY/GX/RADIUS/AAA
Expertise in various protocols e. g.: CDMA, WCDMA, GSM, CIP, SS7, UMTS, SIP, Diameter, GPRS, WAP, IP Mobile, Diameter
Experience of working in an Agile environment will be a plus
Must be a good Team Player
Good knowledge of Linux and Solaris is added advantage
B.E.(Bachelor of Engineering)/B.Tech.(Bachelor of Technologies)/M.Tech preferably in Computer Science or Electronics or Masters in Computer Application (MCA)
4-6 years of experience in software product development - Telecom BSS with substantial hands-on experience in testing Telecom Prepaid Charging System and Integration with Billing and Self-care solutions
Assigned test activities are realized within approved cost, time and quality
Prepare test plans along with Test Lead
Maintenance and update of test documents
Keep description of the test environment (both HW & SW) up-to-date. Track all software and hardware licenses and inventory
Handling the Test environment (including simulators, tools, test server)
Actively participate in project meetings to provide feedbacks, about faults and limitations in the product documentations
Participate in forum and work groups, representing the test area

Verification Engineer Resume Examples & Samples

University degree or above in telecommunication, microwave or equivalent
Good knowledge of wireless theory, principle
Good knowledge of telecommunication systems (GSM, WCDMA, CDMA, TD-SCDMA, LTE, etc)
Experience with RF measurements, using Signal Generator, Spectrum Analyzer, Vector Network Analyzer and other RF measurement equipment
VEE, LabView tool experience is a plus
Good communication skills and social ability, being a team player
Fluent in English speaking, understanding and writing
Design experience with radio products is a plus
Former experience with design for production test is a plus

Verification Engineer Resume Examples & Samples

To support the Project Management phase for the Purchase, Project Management and Verification of new and existing equipment for the Technical Transfer of products from one internal site
Project Management for all activities associated with design,installation and verification of given pieces of equipment
Manage the document development and execution of all Verification activities
Planning, scheduling & tracking progress
Planning, specification & procurement of all start-up consumables
Coordination of loop checking & calibration teams
Responsible for Engineering Change Management systems during all phases of the Project and Verification life cycle
Handover of all systems to site operations team to support PV and CV

Microprocessor Verification Engineer Resume Examples & Samples

Individual will be responsible for performing design verification for POWER & System Z microprocessors and subsystems
You should have proficiency in object oriented programming using languages such as C++ and System Verilog
PhD/Master's/ Bachelor's Degree in Engineering
Experience - 5 - 10 Years
Basic knowledge in Verification (simulation, formal, or emulation)
Processor/Computer Architecture Knowledge, Programming Skills (such as C++/UVM/SV/Perl), Understanding of HDL (VHDL/Verilog)
889213
At least 5 years experience in System Verilog/C++ / OOP Skills, VHDL/Verilog,

Sgsn-mme System Verification Engineer Resume Examples & Samples

Test analysis
Non-functional requirements verification
Product performance verification & validation
Participate in test reviews
Provide test reports
Troubleshoot product problems
Trouble reporting

IMS Nwst Verification Engineer Resume Examples & Samples

Preparation of the node/network configuration for the test
Performing I&V test activities according to the related test specification
Providing system support to other Ericsson design centers or customers all over the world

Microprocessor Verification Engineer Resume Examples & Samples

At least 6 years experience in Microprocessor Verification engineer
At least 6 years experience in C/ C++
At least 6 years experience in Processor architecture

Pervasive Verification Engineer Resume Examples & Samples

Responsibilities include verification of chip test architecture including Scan Verification,LBIST , Array BIST and Register Verification
Good Understanding of processor architecture, test structures and methodologies to build a manufacturable VLSI design in nano scales
Good understanding of digital electronics fundamentals, principles of chip and logic designs
At least 3 years experience in Verification, LBIST, Register Verification

MTS Verification Engineer Resume Examples & Samples

BS and 7+ years experience, MS and 5+ years experience, or Ph.D and 2+ years experience desired
Requires demonstrated technical expertise in functional verification of complex designs including: test planning, test bench development, stimulus generation, checking, and functional coverage
Significant experience with Verilog, C/C++, Perl, and logic simulation is a requirement
Experience with SystemVerilog/OVM is an optional
Requires very strong understanding of computer architecture
Requires strong problem solving skills

EMC Verification Engineer Resume Examples & Samples

Prepare and perform RBS systems EMC testing activities
Ensure correct EMC testing method and result
Guarantee verification activity finish on time and quality
Troubleshoots and debugs on EMC related problems
Participates and contributes to design inspection and / or review
Basic environmental testing, including climatic, mechanical, power/PLD etc
Investigation for new test technology and method
Quality audits
High Energy levels, positive as a person with a can do mentality with high drive ability to get things done
Good cooperation with others

Sgsn-mme System Verification Engineer Resume Examples & Samples

Good knowledge in 3GPP
Solid experience on GPRS and WCDMA systems
Good knowledge in GSN/MSC Core system architecture
Good knowledge in Linux and Unix (Solaris)
Basic programming in Java

System Verification Engineer Resume Examples & Samples

System test, documentation test
Take part in troubleshooting to help designers if needed
Test automation of the tests used by system test team
Create/update the test documentation
Participate in test related improvements (improve and build new test environments)
Ensure timely deliveries
Cooperate with Applications using Telecom Server Platform to improve our system test

Cudb Verification Engineer Resume Examples & Samples

Performing function/system test activities according to the related test specification
Reporting faults and supporting designers with trouble-shooting
Bachelor degree or above, major in electrical engineering, computer science or similar
Proficiency in IP technologies
Experience in using modern software languages such as C/C++ and/or Java

Senior Systems Verification Engineer Resume Examples & Samples

Leading and coordinating all verification activities to meet our customer requirements (regression analysis, writing test plans, executing tests, reviewing results, troubleshooting system, software and facility issues, writing reports, etc)
Developing & executing tests on closed loop benches at P&W
Working with suppliers and design teams to identify and maintain all required support equipment
Coordinating with the design team to ensure that the software meets all customer requirements
Present results of control system software testing at test readiness reviews
Integration with all domestic and international regulatory agencies to ensure compliance with applicable certification standards

Packet Core EPG System Verification Engineer Resume Examples & Samples

Write test specifications and map them to related requirements,
Write test scripts and automate the execution of them,
Write trouble reports with relevant error logs attached,
GSN competence (system solutions and network setup)
Test and verification methods
Good knowledge in routers and switches
Knowledge in scripting
2~3 years working experiences in EPC area is preferred
GPRS/EPC 2nd line or 1st line support experiences is preferred

System Verification Engineer Resume Examples & Samples

Develop test plan according to requirements, design test specification, implement and execute test case, and generate test report
Design and implement test tools to facilitate test execution, automation and continuous integration
Troubleshoot reported issues, identify quality improvement actions and support Software Design Engineer to resolve the problem and implement improvements
Bachelor degree or above of first level University, majored in computer science, information technology or related area
Good Knowledge of script language, shell, perl or python
Good Knowledge of Linux/Unix OS installation and configuration
Knowledge in JAVA/JEE or C++,
Knowledge in SQL and relational database systems,
Knowledge in Spring, Hibernate, Struts and JEE application Server is preferred
Excellent team player and quick learner, passionate about software test technology. Initiative and positive personal personality
Good communication skill to work with cross-functional team
Good speaking and writing skill in English

Formal Verification Engineer Resume Examples & Samples

Primary responsibilities include creating verification test plans and environments on several machine platforms, the ability to learn and use world class verification tools for high-end designs, and the ability in debug and triage of defects found through verification processes
This position requires collaboration across multiple teams including logic design, various verification teams focusing all the way from unit to chip and system level, and processor and system architecture teams
Experience in scripting languages such as Perl, working knowledge of hardware description language (HDL) (VHDL or Verilog), computer architecture, experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc. , and demonstrated communication skills

MPS Verification Engineer Resume Examples & Samples

Develop and Test High Quality Products
Solid computer science and network theoretical knowledge
Telecom. Network knowledge
Familiar with Linux/Unix platform

System Test & Verification Engineer Resume Examples & Samples

Verification of procedures in a customer like network, install, upgrade, and system test
Integration of platform components and applications
Test of OSS application functionality, deployment, availability, robustness, etc
Troubleshooting of issues and taking corrective actions
Development and documentation of release, delivery and maintenance track procedures
Use, development, and maintenance of automated tools for validation of the system
Report on activities to Release/Maintenance management
Previous roles and a proven record and in enterprise system roll-out, integration, test and delivery( OSS systems)
Knowledge of Redhat Enterprise Linux administration and troubleshooting
Hardware (HP blade), storage and networking expertise
Telecom Domain knowledge preferable
Customer knowledge and on-site experience
Knowledge of Java, JEE and JBOSS is a distinct advantage
Understanding of SCRUM, Continuous Integration and Test Driven Development
Knowledge of tools such as Selenium, Squish, Curl, JMeter, LoadRunner, Jenkins and JCat
Knowledge of virtualization solutions such as libvirt, vmware, openstack
Strong analytical and design skills, excellent planning and problem solving skills
LI-BV1

Verification Engineer Resume Examples & Samples

Review and analyze product requirements to design and develop testing artifacts and provide input to product development teams on missing / deficient requirements
Execute bench level testing and record results using various test systems as the product requires
Working knowledge of DMM, Oscilloscope, Video Scope etc
Hybrid, Hydraulic, ECU, or ADAS product/test experience desired
Working knowledge of product development and product testing engineering practices in automotive field
Working knowledge of HIL procedures and equipment
Working knowledge in planned and structured approach
Troubleshooting and debugging skills
Working knowledge of configuration management, and project monitoring and control techniques (preferably PTC/MKS)
Level I: 0-4 years experience regarding Responsibility / Main Activities (listed above) in serial development or comparable experience in automotive (mandatory); electronic (preferable) industry
Level II: 4-8 years experience regarding Responsibility / Main Activities (listed above) in serial development or comparable experience in automotive (mandatory); electronic (preferable) industry
Senior: 8+ years experience regarding Responsibility / Main Activities (listed above) in serial development or comparable experience in automotive (mandatory); electronic (mandatory) industry
Matlab/Simulink, dSpace, Labview, model based development tools
Working knowledge of CAN and LIN based tools such as CANalyzer, CANoe, CANape, neoVI and other automotive networks and related tools
Comprehensive knowledge of English (speak & write)

Compiler Verification Engineer Resume Examples & Samples

5 years work experience in a software development or test organization
Demonstrated strength in problem solving and implement solutions
The candidate must be self-directed, learn quickly, and have strong problem solving skills with attention to detail
Candidate must be able to apply existing skills to new situations
Candidate needs to enjoy testing
Operating Systems: Linux, Windows
QA Methodology: Canidate must have experience writing test plans, test development, test automation, test execution and reporting in a production enviornment
Compiler Domain Knowledge: Candidate should have an understanding of how compilers work and how compilers are implemented
Applications: At minimum candidate should have some experience with a source control tool and must be able to use MS-Office
Programming Languages: Must have experience programming and/or testing in C and/or C++ as well as scripting languages
3+ years experience testing production software. Preferably compiler software
Big Plus: Previous Compiler development or compiler test experience
OS Experience: MS-Windows (Win7/8/10), Linux, MacOS
Tools: Experience with any of the following a plus: Perforce,Git, Make, Coverity, Bullseye
Experience using commercial C/C++ language test suites a plus: Perennial, Modena, Glenn McCluskey
Experience in configuration management or setting up and maintaining builds
Programming skills: C/C++, Python, Perl, Bash
Big Plus: C++11, C++14
Parallel Programming: CUDA, OpenCL, OpenHMPP, OpenMP, C++ AMP
Work experience doing testing and test automation

LTE RAN Verification Engineer Resume Examples & Samples

Report test progress and quality
Good competence on LTE functional test
Good computer skill including the usage of Unix or Linux, Java development or Perl programming is preferred
Communication Skills

HW Verification Engineer Resume Examples & Samples

RTL Design and development of a SoC aimed to demonstrate new low power wireless communications algorithms and techniques
RTL Verification of a SoC using standard methodologies such OVM/UVM
FPGA emulation of a SoC design
Learning and contributing in various design and implementation tasks
Familiar with pre silicon and post silicon validation techniques
Knowledge of FPGA design development
Knowledge of Verilog HDL language
Knowledge of C/C++ language, Python, Perl or any other script programming language

SoC Verification Engineer Resume Examples & Samples

9+ years' experience in ASIC logic verification
9+ years' experience programming in an object oriented language such as System Verilog C++ and/or Specman
9+ years' experience with RTL simulators
9+ years' experience debugging in RTL

SoC Verification Engineer Resume Examples & Samples

5+ years' experience in ASIC logic verification
5+ years' experience programming in an object oriented language such as System Verilog C++ and/or Specman
5+ years' experience with RTL simulators
5+ years' experience debugging in RTL

SoC Verification Engineer Resume Examples & Samples

1)Solid fundamentals in Digital design, VLSI and CMOS techniques
2)Good understanding of Computer Architecture
3)Proficient in C, C++/Verilog/VHDL/System Verilog & OVM or UVM
4)Verification plan from design/architectural specs
5)Verification environment and test case development using System Verilog OVM or UVM
6)Experience with system Verilog Assertions and Functional Coverage development
7)Simulation & debugging of RTL design for SoC/FPGA
8)Experience with Version control tools and Linux environment

SoC Verification Engineer Resume Examples & Samples

This includes resolving issues in RTL2GDS flow like, Logic synthesis, FEV, Block level floor-planning, multi-power domain complexities, Place & Route, clock tre synthesis complexities like balancing the clocks between multiple clocks, LVS & DRC cleanup, timing closure , Electrical Rule Fixes and Quality fixes
Candidate will also be responsible to be part of methodology development in critical design issues, troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention
Good understanding on synthesis, PnR, Timing closure , FEV
Experience with UNIX, Perl and TCL also desired in order to implement usable, flexible C-shell/ Perl/ TCL programs that automate tool/flow methodologies
Must have hands-on experience with industry tools in one or more of these areas. Familiarity with Design Compiler, ICC and timing convergence tools would be added plus

SoC Verification Engineer Resume Examples & Samples

Should have taken digital design, computer architecture courses
Understanding of verification fundamentals and exposure to verification methodologies like UVM/OVM
Should have system verilog experience
Scripting languages like Python, Perl etc is a plus

Pre-si Verification Engineer Resume Examples & Samples

Should have contributed/owned test plans and written test content
Should have experience in assertions and functional coverage development
Experience in development of tets environments is a plus

Pre-silicon Verification Engineer Resume Examples & Samples

Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing
Develop verification collateral (such as behavioral checkers, coverage monitors, test generators or score-boards) to enable test plan execution
Analyze coverage gaps and devise strategies to fill coverage holes. The quality of the design and the final product is directly proportional to the quality of the design verification work
Work closely w/ the Architect/micro-architecture and Design teams in determining the proper validation strategy for new design, defining and provides feedback on TestPlans
Develop, participate and reviews validation codes for efficiency/coverage and drive any paradigm shifts needed in Validation execution
7+ years experience in logic design/verification with various tools and methodologies including: System Verilog, Perl, OVM/UVM, VCS/synopsys simulators, Coverage Tools, UPF / Power Mgmt. Validation, Knowledge of DFX Scan

SoC Verification Engineer Resume Examples & Samples

Should have owned verification of a complex module or a SOC flow. Should have developed test plans and worked with the team for implementation
Leading technical teams would be a plus
Specifically looking for experience working on assembly test content/Core/Graphics validation especially X86 core validation methodologies

Senior SoC Pre-si Verification Engineer Resume Examples & Samples

Should have experience working with advanced verification methodologies like UVM/OVM etc
Should have contributed/owned testplans and written test content
Looking for experience working on assembly test content/Core/Graphics validation especially X86 core validation methodologies

Senior Analog Verification Engineer Resume Examples & Samples

B.Sc/M.Sc. in Electrical Engineering
At least 5 years of industry experience with IC integration and testing
Experience in Analog and Digital circuitry design fundamentals
Proven experience in development of automated test infrastructure, integrated programming in a hardware environment
Experience in lab equipment and measurement techniques

Pmic Pre-silicon Verification Engineer Resume Examples & Samples

Design and Pre-Si verification, including leading Verilog digital behavioral modeling of mixed-signal and analog systems. In this case, specifically PMIC and VRs
RTL design and leading implementation of controller for mixed-signal chips
Developing synthesizable, accelerated, analog behavioral-models for representing PMIC behavior in Pre-Si SoC/ASIC environments
Ownership of Pre-Si functional verification of subsystems and/or complete chips
Debugging if behaviors are caused by errors in the specs, models, design implementation, or tests
Writing verification plans
Writing and maintaining behavioral models and test benches in Verilog
Writing technical documentation and presentation
Debugging systems utilizing encrypted RTL from external sources
Requirements management
5+ years of experience in mixed-signal IC logic design and verification
5+ years of experience writing and fluency in either Verilog or VHDL languages, Verilog and System Verilog heavily preferred over VHDL
3+ years of experience developing behavioral models of analog circuitry
5+ years of experience drafting technical specifications, good English writing and speaking skills
1+ years of leading digital design within a mixed-signal IC design project
Excellent experience and understanding of power management IC (PMIC)
Experience writing RTL for power management ICs
Experience with analog / digital co-simulation tools such as AMS Ultrasim
Experience utilizing emulation platforms such as Mentor Graphics Veloce
Experience writing synthesizable RTL simulation models for analog components -including VRs, DACs, and ADCs within a larger digital environment
Ability to create and evaluate synthesis/build and simulation tool flows
Experience putting together a simulation / regression environment
Experience debugging externally sourced IP from encrypted models

Measurement & Verification Engineer Resume Examples & Samples

Develop measurement & verification plans during the sales development phase
Assess and communicate project risk
Conduct pre and post surveys and measurements as required for fulfillment ofmeasurement and verification plans
Coordinate activities of technicians and subcontractors for fulfillment of measurement andverification plans
Participate in transition meetings with operations team to ensure project scope,objectives, timeline, and customer requirements have been achieved and thestart of the performance period is properly documented
Coordinate with construction project manager to assess the impact on guaranteed savings ofany changes to the contract scope of work
Prepare and present guarantee reconciliation reports for a variety of audiences
Identify potential new opportunities to district sales team
Provide training to district office personnel to support measurement and verificationrequirements
Bachelor's Degree in Engineering and at least 5 years work experience in measurement & verification of system performance required; OR an equivalent combination of education and work experience required
Experience with data logging equipment
Experience with HVAC, control, electrical and domestic water systems
Experience with Metrix® utility accounting software preferred
CMVP®or equivalent certification preferred
Excellentcommunication skills and ability to interface professionally with customers atall levels
Available for significant domestic travel

Senior Verification Engineer Resume Examples & Samples

Expertise in Verilog*, System Verilog*, AVM*/OVM*, Perl scripting, and VCS* simulator
Some of the prior experience has to be in the field of emulation
Logic design skills and thorough understanding at gate level
Strong experience in debugging at the system level
Strong understanding of Register Transfer Level (RTL) design, both at the logic level (RTL)
Expertise in functional coverage concepts/implementation
Strong experience with testplan/testbench and test writing/debug
Working knowledge of UNIX*, and Windows*

Verification Engineer Resume Examples & Samples

Expected to be thorough with general verification concepts with System Verilog/OVM/UVM
Need to be a key team player, while being highly energetic and motivated, independent and self-driven (with minimal mentoring/hand-holding)
Expected to help/drive in throughput test case setup/analysis/report of the DUT
Expected to define functional coverage/code/hit it through sequence enhancement and newer/directed test cases
Prior exposure to FPGA or emulation platforms is a plus
Prior knowledge in Ethernet/TCP/IP protocols and LAN/switching concepts will be a bonus

Digital Advanced Verification Engineer Resume Examples & Samples

MS in Electrical Engineering or comparable engineering discipline
Experience with Mentor Graphics design tools and Verification IP
FPGA/ASIC Design experience
Experience with scripting languages (Bash, Perl, Python, Tcl)
Active DOD Top Secret Clearance

Digital Advanced Verification Engineer Resume Examples & Samples

BS in Electrical Engineering or comparable engineering discipline
5+ years of verification engineering experience (3+ years with an MS, 0 years with a PhD)
Expertise in HDL (VHDL/Verilog) and HVL (SystemVerilog)
Experience with SystemVerilog Assertions (SVA)
Advanced knowledge of UVM
Experience with a coverage-driven verification methodology from planning through closure
Knowledge of industry standard interfaces
Experience with object oriented programming languages and concepts
Be able to work in teams and communicate clearly across various levels of engineers
US Citizenship with the ability to obtain and maintain Secret Security Clearance

Verification Engineer Resume Examples & Samples

Candidate should possess a Bachelor's in Electrical Engineering or Computer Science with 6 years and/or a Master's degree in Electrical Engineering or Computer Science or similar degree with 4 years of VLSI Front-end experience
Extensive knowledge of System Verilog and working knowledge of verification methodologies like OVM and UVM
Good knowledge on functional and code coverage
Adept in programming and/or scripting (C++, Perl* and others) and be conversant with flows and tools for VLSI logic design and/or functional verification
Sound understanding of functional verification fundamentals encompassing state machine verification, complex protocol verification, functional test strategies, directed and stress test generation, verification infrastructures and verification and/or debug flows

Pre-si Verification Engineer Resume Examples & Samples

Should have owned verification of a complex module or a SoC flow. Should have developed test plans and worked with the team for implementation
Should have experience in development of test environments
Experience in leading technical teams would be a plus

System Verification Engineer Resume Examples & Samples

System testing for electro-mechanical steering systems (EPS)
Analysis of technical specifications, i.e. system requirements and corresponding documentation
Development of test suites and test cases according to verification criteria
Design, development and maintenance of SW and System Test and Validation team infrastructure
Execution of test cases for microcontroller systems using variety of methods & tools
Working with tools supporting verification of embedded systems, e.g. test design and automation frameworks (dSPACE), modeling/simulation tools (MATLAB, Simulink), various laboratory equipment
Strong interaction and communication with engineering centers worldwide

Senior SoC Verification Engineer Resume Examples & Samples

Architectural Development of Complex Pre-Silicon Verification environments for simulation and Emulation platform
Development of Verification and coverage plans
Rigorously executing Validation Plans to ensure Right First Time Success of our Products
Experience designing and validating SOC CPUs, Cache Coherency, Graphics and Media blocks and Memory controller
Experience with Low power/UPF verification techniques
Experience with Formal verification techniques
Strong background in scripting - PERL,TCL, Phyton
System (hardware and software ) debug skills
Understanding of software and/or hardware validation techniques
Assembly programming skills
Demonstrate excellent Self-motivation, communication, strong problem solving and teamwork skills
Set aggressive goals and meet/beat the commitments

Principal Verification Engineer Resume Examples & Samples

Verify boot code
Architecting, developing, and maintaining tools to streamline the design of state-of-the-art multicore SoCs
Turn verification tests into hardware-test patterns
Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision
Requires the ability to accept and work with differing opinions - cannot be a close-minded developer

Senior Verification Engineer Resume Examples & Samples

Responsible for generating Cache based functional tests for speed grading and for addressing ATE structural coverage gaps
Convert functional tests into ATE patterns, write scripts to automate test pattern generation process
Support/debug and analyze ATE data from test engineering team during initial bring up and production
Good understanding about Memory BIST & Repair, JTAG Boundary Scan, Scan dump, PRBS Loopback Test / IO BIST for High speed IOs
Long term success is to correlate System Vs. ATE as closely as possible

Principal Verification Engineer AB Resume Examples & Samples

Product and sub-system definition in conjunction with system architects
Working within and leading teams of design engineers to design and deliver complex digital systems or entire projects
Scoping and estimation of digital design tasks and accountability for delivery and quality
Supporting, and where necessary coaching, the digital design team to follow, and improve, defined methodology practices
Hands-on project design/verification involvement
Degree in Electronics and/or Computer Science (or similar)
Extensive experience in design and verification of CMOS digital integrated circuits
Experience and expertise in several of the following areas; Verilog, SystemVerilog or VHDL
Verification with frameworks like UVM/OVM, e, VMM
Strong ability to interpret results and resolve problems
An innovative, creative, lateral thinking problem solver
Strong diagnostic and analytical skills
Audio circuit design
Digital Signal Processing
Digital Filter design
Delta-Sigma designs
Low power design techniques
High Speed digital design techniques

Senior Verification Engineer Resume Examples & Samples

1) At least 6-8 year of relevant experience in SoC verification i.e. developing verification components, preparing and executing test plan for complex Video, Imaging and/or Audio IPs
3) Prior experience in verification/design of Image/Video Processing, Video/Audio Interface (HDMI, DisplayPort etc.) Video Decode/Encode and/or compression/de-compression IPs
7) Excellent debugging and analytical abilities

Systems Verification Engineer Resume Examples & Samples

Plan, implement, test, document and maintain solutions for the integration and test of multiple projects
Develop verification test plans for safety-critical and high-reliability systems
Coordinate associated procedures and schedules with project teams
Synthesize customer needs and requirements into test plans and solutions
Perform functional verification and generate formal test reports
Execute verification efforts within technical, schedule, and cost constraints
Ensure bug-free integration of embedded firmware, software and hardware across the entire system/subsystem under development
Track bugs and technical problems and work with the design team to ensure timely resolution
Degree in Electronics / Electrical / Systems Engineering
5+ years demonstrated experience creating and executing detailed test plans
Experience developing mission-critical code in VHDL, System Verilog, or c/c++
Experience with software and/or FPGA testing methodologies
Experience developing and maintaining Requirements Verification Matrices (RVMs)
Experience in generation of acceptance test procedures
Experience with hardware/firmware integration
Hands on experience with functional testing, debugging and lab equipment (logic analyzers, oscilloscopes, etc)
Knowledge of DO-254 and/or NPR-7150.2A
Experience with NI Labview, Labview FPGA, QuestaSim OVM/UVM, DOORS
Experience with HIL or Model-Based Design, preferably using the MATLAB/Simulink toolchain

Verification Engineer Resume Examples & Samples

Strong knowledge of functional and code coverage
Knowledge of Standard BUS protocols like OCP, PCIe, OCP, AHB, APB
Working knowledge of DSPs
Front-end Design verification experience

Lead Verification Engineer Resume Examples & Samples

Assume a strong Technical role in a Functional Verification team
Develop verification plans at module and sub-system level
7-10 years of relevant experience. Degree in Electrical or Computer Engineering, graduate level or compensating experience
Fluent in System Verilog and UVM methodologies.orking knowledge of PCIe 2.0 & AMBA protocols
Experience in verifying DDR3/DDR4 interfaces and working knowledge of VIP portfolio.Scripting experience in PERL, Python, and Shell required, C/C++ preferred

Verification Engineer Resume Examples & Samples

Electrical/Computer Science engineer with GPA of > 85
Good understanding and knowledge of object oriented programming concepts
Willing to work in dynamic and demanding environment
Knowledge in the following programming languages : Perl/Bash/TCl/Python
Verilog/SystemVerilog/Specman

Lead Verification Engineer Resume Examples & Samples

BS degree with 4+ years of applicable experience, MS degree with 2+ years of applicable experience in electrical engineering,microelectronics, comparable engineering science or solid state physics
Essential that the individual demonstrates strong communication, verbal and written. Requires good communication skills in English
Will have demonstrated hands-on experience and expertise with Cadence verification design tools or equivalent tools, flows and methodologies required to execute a verification project
Will have demonstrated successful completion of 3+verification projects as an individual contributor
Will have DDR project verification experience

Formal Verification Engineer Resume Examples & Samples

The ideal candidate will have at least 4+ years of experience including
Advanced knowledge of CPU or preferably GPU design architectures, VLSI circuits, and digital logic design
Experience in formal verification and analysis of pipelined micro-architectures, MMU’s, and cache coherency control mechanisms
Strong experience with formal tools, such as Jasper, IFV, etc
Deep understanding of abstraction techniques and formal verification technologies
Knowledge and experience in reviewing and interpreting hardware specifications
Experience with HDL's such as Verilog/System Verilog and temporal logic assertion-based languages such as SVA
Hands-on experience in using EDA formal verification tools. Experience in using academic tools is a plus
Proficiency in programming/scripting languages with excellent debugging skills
Knowledge of constrained random verification methods is a plus
Excellent communication skills and ability to collaborate

Senior SoC Verification Engineer Resume Examples & Samples

7+ years SOC verification experience
Expertise in HVL and HDL(SystemVerilog, Verilog)
Advanced knowledge of HVL methodology (UVM/OVM/VMM)
Experience writing scripts in languages such as Perl or Python a plus
Programming experience in C/C++/assembly a plus
Experience with SystemVerilog Assertion (SVA) a plus
Should be a team player with excellent communication skills and the desire to take on diverse challenges

Digital Verification Engineer Resume Examples & Samples

Advanced knowledge of standard ASIC design and verification flows including RTL design, simulation and testbench development
Expertise in HVL and HDL (SystemVerilog, Verilog)
Advanced knowledge of HVL methodology (UVM/OVM)
Solid verification skills in problem solving, constrained random testing, and debugging
Experience with SystemVerilog Assertion (SVA) a plusTeam player with excellent communication skills and the desire to take on diverse challenges

Senior Verification Engineer Resume Examples & Samples

Typically requires at least 10+ years of industry experience
Prior experience verifying silicon ICs shipping in high volume is required
Advanced knowledge of ASIC design and verification flow including RTL design, simulation, synthesis, testbench development, regression, equivalence checking, timing analysis, scan insertion and test pattern generation
Experience with low-level programming of systems in C/C++/assembly
Experienced with UVM. Specman is a plus
Experienced in writing scripts in languages such as Perl, Python, and Tcl
Understanding of constrained random verification process, functional coverage, and code coverage
Experience with formal verification tools is a plus

SoC Power Verification Engineer Resume Examples & Samples

A strong candidate would have experience in design verification and an interest in power optimization
Familiarity with Verilog and System Verilog
Familiarity with script writing in Perl or Tcl
Familiarity with C, Assembly programming, and associated tool chains
Familiarity with verification environments, RTL design characteristics, simulation tools, and emulation tools
Knowledge of SoC power characteristics and intended usage for mobile products a plus
Ability to quickly understand and work with new tools
Good communication skills to work across multiple disciplines

Formal Verification Engineer Resume Examples & Samples

The ideal candidate will have the following experience
Advanced knowledge of SoC/CPU/GPU designs, VLSI, and digital logic design and verification techniques
Developed formal property proofs on industrial strength designs and architectures
Deep understanding of pipeline architectures, memory/DMA controllers, out-of-
Order and speculative instruction execution hardware, bus interconnects, and
Cache coherence mechanisms
Solid understanding of formal verification technologies/abstraction techniques
Knowledge and experience in interpreting hardware specifications and using
Temporal logic assertion-based languages such as SVA or PSL
Experience in using EDA formal tools and tool development experience is a plus
Proficiency in any scripting language with excellent debugging skills
Strong team player with excellent communication skills
Passionate about developing world-class/innovative formal verification solutions

SoC Verification Engineer Resume Examples & Samples

Design Verification of Coherent Bridge IP cores and subsystems using latest verification methodologies such as System Verilog, UVM
Develop Functional test plans for the various IP cores and subsystems. Develop constrained random verification tests and directed tests and ensure that functional coverage, code coverage and performance goals are met Develop formal verification strategy, create properties and constraints for IP cores
Work with Architecture and Design Engineering teams and ensure that IP cores work as per the standard Perform gate level and back annotated timing simulations
Work closely with Design Engineering Team, Architects, Validation and Software teams and ensure robust verification of IP cores in a subsystems
Assist in post silicon bring-up and debug 8 -12 years of experience in ASIC/SoC Design Verification including, experience using latest Verification methodologies such as System Verilog, and UVM
Direct and relevant experience with multi-CPU core SOC solutions ARMv8 processor architecture understanding and knowledge
Broad experience in SoC development from design concept through silicon bring-upSearch Jobs US

Verification Engineer Resume Examples & Samples

Offer suggestions to refine and automate test procedures
Support development teams and provide need pre-qualification and verification testing
Support the qualification of lab area productivity improvement efforts, including testing, building fixtures, calibration and data collection
Support compliance/closure of Regulatory and Quality requirements before completing Design Outputs/Program Deliverables
Bachelor's Degree in Mechanical engineering, Electrical Engineering, Software Engineering, Computer Science, Industrial Engineering, or related field
Understanding of qualification of equipment and test procedures
Strong interpersonal skills, including good technical communication
Previous project or team experience
Experience with electrical and mechanical design development tools
Ability to write reports and procedure manuals, and to effectively present information and respond to questions from managers and engineers
Experience in developing test tools to improve productivity
Experience in a health-care related field
Knowledge of FDA, MDD, IEC, and ISO regulations and guidelines

Performance Verification Engineer Resume Examples & Samples

Advanced knowledge of CPU & SOC architecture/design & in-depth knowledge of verification flow
Familiarity with verification environments, VMM, System Verilog, and DPI is a plus
Knowledge of industry standard interfaces, good understanding of Verilog, Verilog simulator and debug
Clear understanding of constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy
Knowledge performance modeling and hardware acceleration is a plus

SoC Verification Engineer Resume Examples & Samples

Strong problem-solving & debugging skills
Solid verbal and written communication skills
BS or MS Degree in Electrical Engineering, Computer Engineering, or related degrees
At least 6 years of experience in verification of Digital designs
At least 2 years of experience in SystemVerilog
Recent UVM/OVM & Testbench experience
Knowledge of SystemVerilog Assertions
Experience with complex scoreboarding
Low-power/UPF verification

Pre-si Verification Engineer Resume Examples & Samples

Responsible for verification of design, architecture, golden models and micro-architecture using advanced verification methodologies
Running RTL simulations, developing testcases to execute the feature testplans & debugging design/TB issues
Create functional coverage points, analyze coverage, and enhance test environment to target coverage holes
Familiarity with OOP’s concepts and OVM/UVM methodologies
Hands on experience with coding and developing testbench components like BFM’s, Monitors and Checkers/Scoreboards
Good understanding of overall Validation flows & tools
Familiarity with Functional Coverage, Code Coverage & Assertions concepts & methodologies
Preferable but not desired, is some familiarity/experience with Formal Property Verification flows/tools
Possesses good problem-solving, communication, and interpersonal skills
Knowledge Cache based designs & Cache Coherency flows is a big plus

Pre-silicon Verification Engineer Intern Resume Examples & Samples

Self-motivation, strong problem solving and verbal/written communication skills, and be a team player
Knowledge of Network Devices and experience with validating Link Layer protocols
Working knowledge of the OVM/UVM framework

Asic Formal Verification Engineer Resume Examples & Samples

In this role, you’ll lead & develop hands-on the formal verification activity for the project
Must have experience in Formal Verification methodologies
Must have excellent knowledge in Verilog
Must have good scripting skills (Tcl, Python, Perl)
Experience with advanced verification methodologies (constraint random, coverage driven, verification reuse) as UVM , eRM, VMM, OVM – an advantage

Senior Pre-si Verification Engineer Resume Examples & Samples

Responsible for understanding the design and implementation, defining the verification scope, developing/maintaining the verification infrastructure (Transactors, Testbenches, BFMs, Checkers, Monitors)
Definition and development of testplans, Functional coverage points, Assertions, Random/Directed tests to validate design
Work with other cross cluster, full chip teams to ensure seamless integration of verification components
Solid experience with HVL’s like SystemVerilog, or Specman
Experience with Perl, Shell scripting, Makefiles, TCL a plus

Verification Engineer Resume Examples & Samples

Develop automatic test (SW development)
Develop simulation
Develop and improve test methods and tools
Perform verification on a full system level
Improve test environment and hands-on work with test rigs
Perform exploratory testing on the telematics product
Document test methods
Master’s degree in electronics / computer engineering or equivalent education
Relevant experience in verification tool chains (e.g Vector CAN tools, CANoe)
C or python
Good knowledge in electronics and IT-systems
Several years of work experience with embedded software verification
Well spoken and written English

100

Digital Verification Engineer Resume Examples & Samples

Applicants should have a minimum of 5 years of digital verification experience including all, or some, of the following
Detailed knowledge of self-checking testbench architectures (including directed and random-constrained generation) and coverage-driven verification techniques at the functional, assertion and code levels
Experience in verifying USB, Embedded Microcontroller, DMA, AHB, Peripheral interfaces for FPGA or ASIC

101

Pre-si Verification Engineer Resume Examples & Samples

Development of test bench components for a simulation and emulation-based environment: bus functional models, trackers, checkers, scoreboards, and testbench
Work with Software, tools, micro-architecture and full chip teams to ensure seamless validation
Familiarity with OOP’s concepts and OVM/UVM methodologies, C, C++
Knowledge Cache based designs, Cache Coherency flows, Power Management Flows is a big plus

102

Co-op-verification Engineer Resume Examples & Samples

To setup full Test rigs (Telematics & Entertainment) according to specifications within the lab
To document the Test rigs information in a global team place
Test case development, execution under a diverse collection of operational scenarios, data analysis, results interpretation and reporting, competitive analysis, issue debugging, enhancement and automation of test procedures as well as stability analysis
Work closely with other engineers (colleagues from the Back Office team - Volvo Group Telematics at Volvo IT, and Electrical Engineering departments) to help secure quality
To support Project Managers in their projects as needed
Programming and or scripting class completion
Data communication theory class completion
Basic electronics knowledge - wiring and connection of electrical signals
Wireless standards, network and communications protocols: GSM, GPRS, GPS, SIP, TCP/IP,

103

Principal Verification Engineer Resume Examples & Samples

Improve existing design verification methodology, tools and flows
Development of Verification Test benches based on
Coverage driven metrics
Constrained Random Stimulus generation
Assertion based formal checking
Property checking / Behavioral model development
Work as one team with other R&D functional teams, define and implement test features required for bring up, debug, validation, characterization, and production
7-10+ years of relevant experience. Degree in Electrical or Computer Engineering, graduate level or compensating experience
Experience in verifying DDR3/DDR4 interfaces
Scripting experience in PERL, Python, and Shell required, C/C++ preferred
Proven success in development of complex custom ASIC products in advanced process nodes preferably FINFET technologies

104

Verification Engineer Resume Examples & Samples

B.Sc. in computer science or SW/computer Engineering
1-7 years of experience
Good programming skills in c/c++. Python is a plus
Knowledge in operating systems
Knowledge in Linux is a plus

105

Senior Asic ASE Verification Engineer Resume Examples & Samples

In standard-cell based ASIC design methodology (RTL2GDS flow, ICC, Innovus, PT, Tempus, Redhawk, Voltus)
With transistor level design is also a plus in dealing with diverse customer requests
In Automating Flows/Scripting with Unix shell, Perl and TCL

106

System Verification Engineer Resume Examples & Samples

Plan, oversee and execute the verification activities in the project/system, including initiation, test design, coordination, synchronization, review and integration of the technical work
Support and interact with other teams for verification, integration, validation and post validation. Problem solve and take feedback into the next improvement cycle. This includes coordination nd collaboration with cross-functional and other verification teams
Review and approve executed test results to confirm test results provide proper objective evidence requirements are met and are compliant to the verification process

107

SW Verification Engineer Resume Examples & Samples

Write formal verification test plan for requirements\User stories
Execute the tests and analyse results
Seek out expertise, knowledge, and resources to develop solutions to problems
Develops the test environment and sets up regression and integration tests, as well as verification and acceptance tests, as required in the projects
Write details tests plan for automations developers to efficiently cover the developed scenarios
Design and execute manual test plans across multiple browsers, applications and data bases
Work with Development groups to identify and resolve problems
Prepares an optimal test plan for each project, including specification of test tools and test criteria
Analyses test results, analyses the cause of errors, and gives feedback to the Development Engineers, reports results to project management and Change Control Boards (CCB) and writes problem reports
Running manual and automation tests
Identify & triage UI inconsistencies and visual design defects
Writing bug report and open defect with highly attention to small details
Report and track defect using TFS
Over 3 years of experience as a test engineer
Working experience in agile methodology
Fluent English written and spoken
Experience in UI based tests in a client server software configuration
Experience as a verification engineer in Medical device– must
Experience in automation at the script level – an advantage
Candidate must have strong communicative skills and proven record of working with R&D units
Candidate must have the ability to quickly acquire technical knowledge from documentation and from on-the-job training
Excellent verbal and written communication skills with English fluency

108

Pre Si Verification Engineer Resume Examples & Samples

Adept in programming and/or scripting (C++, Perl* and others) and be *conversant with flows and tools for VLSI logic design and/or functional verification
Requires good communication skills as the role involves customer interaction
Intel Chassis architecture, IOSF spec, UPF methodology, Intel tools and methodologies used for IP Verification

109

Verification Engineer Resume Examples & Samples

BS OR MS degree in Electrical Engineering or Computer Science
7+ years of work experience in the Wireless Industry
5+ years of experience with Air Interface Testing and Testing of Protocols of Mobile Communication Standards
5+ years of experience with Project Planning aspects including Test Scope, Effort Estimation, Resource Planning, Measurements and Analysis
5+ years or experience Test Case Development on major Test Equipment Vendors and the capability to Debug and Optimize Test Suites
5+ years of experience with Managing Protocol Test Systems
5+ years of experience working with Embedded Systems and Software, Particularly Mobile Chipsets or Base Station Chipsets
5+ years of experience with Scripting and Automation, working with Test Box Vendors
5+ years of experience with System Development and Verification Testing Methods and Concepts for Wireless Devices

110

Performance Verification Engineer Resume Examples & Samples

Plan, set-up, and execute Qlik scalability and performance tests/investigations
Design, develop, and maintain automated test cases to validate product performance and stability
Validate and identify product boundaries and limitations
Communicate status on quality attributes performance and stability to relevant stakeholders

111

Test Verification Engineer Resume Examples & Samples

Bachelors degree and 5 years of related experience
Space - (Military Satellite Communications)
Test & Evaluatioin (Space Communications )
Masters System Engineering Experience - Systems Engineer (System Engineering) Practitioner
System Design - System Integration & Verification (System Engineering) Expert Practitioner, Senior Practitioner
10+ years demonstrated experience in multi-faceted tests and test project teams, to include oversight of scheduling
10+ years test and evaluation experience with DoD/USAF test processes and documentation
3+ years’ experience in DoD and commercial SATCOM and network engineering
Capable in Microsoft Office products (Word, Excel, Powerpoint)M

112

Nand Pre Silicon Verification Engineer Resume Examples & Samples

The candidate must be pursuing a MS degree in Computer Engineering, Electrical Engineering and/or other related field
6+ months of experience in High level programming language such as C++, perl, tcl
6+ months of experience in Semiconductor Device Physics
6+ months of experience in Logic and Mixed signal simulation / verification
6+ months of experience in Unix environment
6+ months of experience Microsoft Office tools
6+ months of experience in NAND Flash or NOR Flash or Non-Volatile Memory Experience

113

Formal Verification Engineer Resume Examples & Samples

Advanced knowledge of digital logic design and verification techniques
Developed formal property proofs
Solid understanding of formal verification technologies and abstraction techniques
Knowledge and experience in interpreting hardware specifications and using temporal logic assertion-based languages
Advantage: Experience with System Verilog Assertions (SVA)
Proficiency in TCL/Perl with excellent debugging skills
Strong team player, excellent communication skills and ability to collaborate

114

Principal Verification Engineer Resume Examples & Samples

Develop and implement test plans with directed and random SPARC assembly tests and/or system verilog tests
Develop verification components (checkers, monitors, stub models) to verify the design under test using UVM concepts
Create and debug failures, enhance and maintain regressions
Write functional coverage objects and meet coverage goals
Performance verification of design under test
Provides technical advice, leadership and direction to junior engineers

115

Senior Verification Engineer Resume Examples & Samples

Develop the architecture for a functional verification environment including reference models, bus functional monitors and drivers
Develop tests and tune the environment to achieve the coverage and performance goals
Debug failures and work with the logic designers to resolve the issues
Diligent, detail-oriented, and willing to take initiative
Must have effective interpersonal and teamwork skills

116

Verification Engineer Resume Examples & Samples

Strong verification skills including a good knowledge and understanding of different verification methodologies
Strong knowledge of Python
Working knowledge of C, C++
Strong knowledge of working on Linux/Unix systems
Self-motivated, good communicator, precise documentation, meticulous in work, quick learner and good team player
Experience with High-Level Synthesis tools & SystemC is a plus
Working knowledge of version control systems (GIT, ClearCase preferred)
Display positive attitude and demonstrate flexibility in day-to-day work

117

EMC Verification Engineer Resume Examples & Samples

Energize others by spreading a positive energy
Edge you can take tough yes/no decision and implement them
Perseverance, dig into the detail of every problem and never give up

118

Senior Verification Engineer Resume Examples & Samples

BS/MS in Electrical Engineering or equivalent with 5+ years of verification experience
Experience in verification using random stimulus along with functional coverage and assertion-based verification methodology
Experience with UVM/VMM environment block level and system level verification
Experience with scripting languages such as Python and Perl is a plus
Knowledge of industry standard communication protocols
Good debugging and problem solving skills

119

Verification Engineer Resume Examples & Samples

Carrier Acceptance Testing: AT&T, Verizon, T-Mobile Etc - Automating Test Cases
Worked closely with customer and internal project management teams
Scripting knowledge using Perl, java scripting, Python, TCl, VBScript, windows, PowerShell or similar
Hands on work experience using test simulators like: Rhode & Schwarz, Spirent, Anritsu and Anite
Strong knowledge & real time work experience on 3GPP/3GPP2 technologies like GSM/WCDMA/LTE/CDMA
Understanding of 3GPP Rel 11,12 and 13 features and upcoming 5G technology
Work closely with customer and internal project management teams
Must have ability to multi-task in a very dynamic environment
RF Conformance test experience
Understanding Operator Requirements
Understanding of USB and PCIE interface

120

Senior Verification Engineer Resume Examples & Samples

Working knowledge of SystemVerilog and UVM
Background in behavioral modeling methods
Ability to debug RTL and gate level simulations
Experience with real number modeling of analog circuits
Working knowledge of Cadence analog design/simulation environment

121

Pre-silicon Verification Engineer Resume Examples & Samples

4 plus years of hands-on verification experience using SystemVerilog and OVM/UVM
4 plus years of proven track record in ASIC verification from environment development to tests development
3 plus years of experience in development and deployment of verification strategies and methodologies across teams and organizations
3 plus years of expert level knowledge of simulation tools such as VCS from Synopsys
Master’s degree or higher preferred
Strong understanding of engineering design principles
Experience in C/C++ is highly desirable
Experience in network ASIC design verification is a plus, such as Ethernet, PCI-Express, InfiniBand, SONET
Proficiency in scripting languages and utilities including Make, Perl, Python, etc
Experience with implementation of modern verification environments that include use of constrained-random stimulus and use of functional coverage
Experience with creation of plans, schedules and cost estimates for design verification efforts

122

Pre-si Verification Engineer Resume Examples & Samples

Strong working knowledge of System Verilog, and Object Oriented Programming techniques
Experience with VMM/OVM/UVM or similar
Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy or dve)
Knowledge and experience with Perl or similar scripting languages
Experience in architecting test bench environments for unit and system level verification
Experience with configurable and reusable IP development
Experience with standard interface IP designs such as IOSF, IDI, etc. is a plus
Experience in working in an SoC environment is a plus

123

Digital Verification Engineer Resume Examples & Samples

Perform digital design work across all aspects of the design flow from RTL to GDS
Team with senior design engineers to conceive and implement innovative design solutions
Perform verification planning and execute both digital and AMS verification
Develop synthesis constraints and perform logic synthesis
Perform physical design

124

Senior Verification Engineer Resume Examples & Samples

Expertise in Verilog*, System Verilog*, AVM*/OVM*, Perl scripting, and VCS* simulator -Some of the prior experience has to be in the field of emulation
Strong understanding of Register Transfer Level RTL design, both at the logic level RTL
Strong experience with testplan/testbench and test writing/debug - Working knowledge of UNIX*, and Windows*

125

Digital Verification Engineer Resume Examples & Samples

Writing modular constrained-random verilog and system-verilog testbenches
Performing functional coverage,
Assertion coverage, and code coverage
Creating and tracking testplans
Analyzing failure cases and running gate-level simulations

126

Pre-silicon Verification Engineer Resume Examples & Samples

6 plus years of hands-on verification experience using SystemVerilog and OVM/UVM to include having built a test environment based on OVM/UVM
6 plus years of proven track record in ASIC verification from environment development to tests development
4 plus years of experience in development and deployment of verification strategies and methodologies across teams and organizations
4 plus years of expert level knowledge of simulation tools such as VCS from Synopsys
Master's degree or higher preferred
10 plus years of hands-on verification experience using SystemVerilog and OVM/UVM is highly preferred
4 plus years of experience with leading a team of 5 or more engineers to include mentoring junior engineers highly preferred
Experience with creation of plans, schedules and cost estimates for design verification efforts desired
Strong understanding of engineering design principles preferred

127

Verification Engineer Resume Examples & Samples

Participate to review product CRS, SRS, SDS/PDS, RMF, Safety & Regulation requirement, etc. Estimate requirement testability and sufficiency
Participate in electric structure design, responsible for cable design, label design and warning mark design, etc. Assemble and debug prototypes to verify Service Requirement and Manufacturing Engineer Requirement
Trace and review ME/Service Validation activities, Reliability test and EMC/Safety test, join in reliability and EMC improvement
Support product regulation certification and register
Develop Verification Plan (include but not limited to: )
Review product requirement specification and clearly understand each requirement in requirement specification documentation
Estimate resource (manpower and capital) requirement for certain amount of verification work
Understand the analysis of hazardous impact of medical product to different personnel (patient, operator, etc...)
Develop test case per each requirement in requirement specification documentation
Schedule test case review meeting with relevant parties
Perform verification testing ,track product problem (include but not limited to: )
Setup test environment per Verification Plan
Execute each test case on test bays
Log defect to defect management tool
Update test cases’ execution result to test case management tool
Attend defect review meeting and join team to analyze defect impacts to test deliverables
Trace requirement matrix and output traceability map
Optimize verification technology and process, communication and sharing with other guys and departments
Develop Verification Report (include but not limited to: )
Draft verification report in the end of each beta cycle
Schedule verification report review meeting with relevant parties
Get verification report approved in Agile system
Provide procedure and technical training to new engineers (include but not limited to: )
Understand all procedures which are deployed in R& D department
Understand all technical knowledge which are required for medical products’ verification
Present above knowledge to new engineers when they are onboard
Develop unit and system auto test platform HW and SW
Medical products’ experience is preferred
Strong interpersonal and communication skills with the ability to communicate with different functions, e.g. System, Physics, SW, etc..
Knowledge of the V-model development cycle
Knowledge of hardware, embedded software and auto-test software
Familiar SPI and RS485/232 communication protocol, NI LabVIEW experience is much preferred
Good command of English skills (both written and verbal). Good Chinese language skills is a MUST

128

Nand Pre Silicon Verification Engineer Resume Examples & Samples

The candidate must possess a BS degree in Computer Engineering, Electrical Engineering and/or other related field
Minimum 6 months of experience in Verilog / System Verilog design and verification
Minimum 6 months of experience BFM Bus Functional Model verification of NAND flash memory
Minimum 6 months of experience Logic and Mixed signal simulation / verification
Minimum 6 months of experience Unix environment
Minimum 6 months of experience Microsoft Office tools

129

Verification Engineer Resume Examples & Samples

Verification of chip level functionality (mainly connectivity, programmability, power up/down, mode control, reset)
Negotiating and executing functional verification plans
Writing/debugging/maintaining behavioral models, monitors, and self-checking testbenches
Logging bugs and tracking verification results
Delivering status reports and verification reviews
Generating and maintaining verification schedules.Search Jobs US

130

SoC Verification Engineer Resume Examples & Samples

Verification test bench development and implementation
Development of verification testbench components such as drivers, monitors, response checkers
Development of direct and constrained-random stimulus
Understands and analyzes RTL code coverage results
Understands functional coverage methods
Assembly Language Programming skills, such as PPC and ARM
MP Cache/memory subsystem of CPU core plaform
AMBA4 bus protocol
Formal verification methodologies
Scripting - PERL, UNIX/LINUX

131

Digital Verification Engineer Resume Examples & Samples

Develop verification plans in co-operation with architects and design leads
Develop and execute block/top-level test cases (random and directed tests)
Develop/update the verification environment (update verification components, drivers, checkers and Tcl procedures to his/her test needs)
Document work conducted
Coach junior colleagues

132

SoC Verification Engineer Resume Examples & Samples

Assembly Language Programming skills, such as PPC
Cache/memory subsystem of CPU core plaform
AXI/AHB bus protocol

133

Pre-silicon Verification Engineer Resume Examples & Samples

Enhanced the existing OVM/UVM DV Agent to support new features (Monitor, Driver, ScoreBoard)
Develop the actual DV test
3+ years of experience in VMM/OVM/UVM in verification
2+ years of experience in VCS and Coverage
2+ years of experience with understanding of scripting language (Perf, Phython, make file, etc)
Experience in Java, C, C++ and logical design a plus

134

Senior Pre-silicon Verification Engineer Resume Examples & Samples

Develop the actual OVM/UVM DV Agent (Monitor, Driver, ScoreBoard)
Collecting and Closing on all functional coverage analysis and enhance the test case to cover the coverage gap
Develop the actual micro-controller test in actual C / C++ / Asembly using the micro-controller SDK
Ability to use Tensilica SDK to develop Tensilica binary code for testing
4+ years of experience in high performance ASSP design
4+ years of experience in VMM/OVM/UVM in verification
3+ years of proficiency in OVM/UVM/SystemVerilog
3+ years of proficiency in C / C++ / Assembly language
3+ years of experience in VCS and Coverage
3+ years of experience with understanding of scripting language (Perf, Phython, make file, etc)
2+ years of experience leading a small DV team to achieve a challenging DV goal
Experience in Cadence Tensilica is a plus

135

Senior Pre-silicon Verification Engineer Resume Examples & Samples

Work as senior DV Engineer for the DUT IP verification team and be responsible for developing an efficient and effective constraint random environment using OVM/UVM base DV infra-structure
Write the uArch specification of the OVM/UVM testbench base on the Arch/uArch definition of DUT
Develop the actual test, and enhanced the TB to improve coverage
Develop pre-Silicon functional validation tests to verify system will meet design requirements
Experience in Java, C, C++ and logical design is a plus
Familiar in standard specification technology like (PCIe, SR-IOV, VirtIO, NVMe)
Familiar with TCP_IP OffLoad Engine (such as TSO, RSS)

136

SoC Verification Engineer Resume Examples & Samples

Lead a verification team
Implement verification methodology including testbench development
Verify the integration of complex IP through simulation of RTL and gate level designs
3 years minimum experience in SOC design or verification
Travel – less than 5%
MS in Electrical Engineering
Proficient in writing and debugging tests in UVM
Experience coding UVM testbenches, scoreboards and monitors
Familiarity with TLMs
Exposure to low power simulations
Experience creating and using IP-XACT component descriptions
Experience supporting hardware emulation
Exposure to Cadence, Synopsys, Mentor and/or ARM verification tools
Experience with industry standard interfaces such as DDR, PCIE, SATA, and USB

137

Digital Verification Engineer Resume Examples & Samples

Digital verification
Digital Logic, Object Oriented programming, data structures
WiFi or wireless communications industry experience - UVM experience

138

Formal Verification Engineer Resume Examples & Samples

Requirements capture, specification, development and deployment of formal verification workflows
Supporting users encountering issues with formal workflows and formal platform tools
Developing new features, improvements and optimisations to formal workflows
Collaboration with vendors through evaluations, optimisations and continuous improvements
Use of key metrics to drive improvements in formal usage, workflows and driving vendor engagements
Training and mentoring users in the use of workflows and techniques
MS degree or PhD in Computer Science / Computer Engineering is preferred
BS degree in Computer Science / Computer Engineering may be considered for candidates with other project or work experience with essential skills and experience
Knowledge of property-based model-checking and/or theorem-proving
Familiarity with SystemVerilog Assertions (SVA) or Property Specification Language (PSL)
Understanding of CPU architecture or microarchitecture specifications
Understanding of RTL verification workflows
Knowledge in Python, Perl or TCL scripting languages
Strong programming skills along with excellent problem-solving and debugging abilities
Willingness to travel to other ARM sites within Europe

139

Senior Verification Engineer Resume Examples & Samples

Work on the latest ARM CPU architecture technology
Interact with internal and external customers to understand the verification coverage requirements
Proactively play a key role in test plan development based on the architecture specs
Define, Design and Deploy complete coverage package to various internal and external customers
Btech/B.S. or MTech/M.S. in Computer Engineering/Computer Science or Electronics Engineering
9+ Years of engineering experience in verification/tool development
Experience in coverage and assertion based verification
Experience in HVL languages like SystemVerilog, Vera
Proficiency in C and assembly
Ability to work with the team to achieve timely and quality deliverables
Excellent problem solving, software and debugging skills
Familiarity with ARM architecture
Knowledge of ARM Assembly
Knowledge of Simulators like VCS, Questa, NCSim etc
Experience with atleast one scripting language (Python/Perl)

140

Senior Verification Engineer Resume Examples & Samples

Able to work alone as well as contributing to a project team
Understands the process of product development
Btech/B.S. or MTech/M.S./PhD in Computer Engineering/Computer Science or Electronics Engineering
4+ Years of engineering experience in CPU verification
Good in logical programming using C, Assembly with experience in adopting software engineering best practices
Basic understanding of Operating system internals
Familiar with Embedded Software Development flows and best practices

141

Senior Verification Engineer Resume Examples & Samples

Planning and estimation of your work
Developing and maintaining the test bench
Gathering and reporting metrics

142

Senior Verification Engineer Resume Examples & Samples

Technical ownership of Project to deliver effective System Verification of ARM IP
Planning and coordination of tasks to meet Design Verification goals on time and with quality
Work with stakeholders; informing, communicating progress
Good university Degree in Computer Science, Microelectronics, or Electrical Engineering. Other Science graduates would be considered if they have relevant experience
Ideally, 4-6 years of relevant experience
Excellent C++ programming skills with good understanding of compilers/linkers
Scripting experience (preferably Perl/Python)
In-depth understanding of at least one multi-core application class microprocessor that is used for parallel computing
Experienced in Software Development Cycle
Experience of using Emulation tools, silicon test chips, boards and FPGAs for hardware platform based design verification and debugging skills
Expertise in developing Random Instruction Sequences for a multi-processor system with very good understanding of architecture including memory coherency and ordering
Familiarity of UNIX / Linux working environment
Experience of ARM based System Designs
Basic understanding of Linux OS and kernels will be an added advantage

143

Verification Engineer Resume Examples & Samples

Creating and reviewing design verification documentation
Coaching and mentoring junior engineers
Proficiency in at least one Object Oriented programming language
Experience working as part of a team to deliver a complex product
Experience of development of coverage-driven constrained random test environments
Exposure to all stages of the design cycle: initial concept, specification, implementation and testing, documentation and support
Leadership experience, including planning and managing tasks
Experience of RTL verification for complex ASIC products
Experience of low power RTL design
Competency in C/C++ or Assembly language (preferably ARM) programming
Competency in a hardware design language, preferably Verilog
Knowledge of formal verification techniques and tools
Line management experience

144

Senior Verification Engineer Resume Examples & Samples

Designing and integrating testbenches, stimuli, test cases, assertion properties, and verification flows for functional blocks including creation of detailed specification documents to meet market, product, architecture, and engineering requirements, as well as participating in related cross site reviews to achieve quality design goals
Implementing, optimizing, validating, debugging, and executing verification or validation tasks, as well as validating and debugging corresponding designs in required programming languages, tools, and working environment according to corresponding specs and engineering flows, from inception to final delivery
Working as a senior member in a team to plan, track, and deliver tasks, mentoring others to ensure quality delivery meeting all project requirements
Involvement in growth and development of the team, as well as technology creation, engineering escalation, and product sustaining related activity within the scope of company business
At least 5 years of experience in design verification, system validation, firmware programming, or digital design for comprehensive functional blocks with technologies such as computing, multimedia, or communication
Expertise in function pipelining/partition, advanced logic design, system integration and simulation, verification and validation, failure analysis and debugging, as well as functional or design verification flows/tools and closure/signoff
Proficiency in either of computer architecture, computing arithmetic/algorithm, image/video processing, communication protocols, or sophisticated memory/bus structures/interconnects
Exposure to all stages of the engineering process from exploration and proof-of-concept, to delivery and maintenance
Ability to communicate in written and spoken English
Hands-on experience in design verification of CPU, GPU, DSP, or similar processors with low-power methodology
Familiarity in programming of system firmware, operating system software, or middleware
Knowledge of DFx, IC test vector generation, and IC testing flow
Experience of using formal property checking methodologies
Skillfulness in programming languages such as SystemVerilog, CPU assembly language (preferably ARM), C/C++, or Perl/TCL/Python scripts
Experience of working across sites in global teams

145

Senior Verification Engineer Resume Examples & Samples

Be one of the RIS experts supporting the design verification teams within ARM and Partners across the globe to help them achieve their design goals
Activities include but not limited to are
4+ Years of experience in pre silicon and/or post silicon design verification
Experience in IP verification and methodologies
Good Programming skills
Excellent problem solving and debugging skills
Quick learner and a strong desire to learn new skills/approaches
Self-motivated and willing to take up additional responsibilities to grow as a team’s pivotal member and play a key role for the team’s success
Pre-silicon and/or Post Silicon Processor and Memory System Verification skills
Experience in Random Instruction Sequence verification methodology
Very good understanding of Computer Architecture and Microarchitecture
Some level of proficiency in C/C++ and assembly language
Knowledge of C models and compiler tools
Ability to do RTL level debugging

146

Verification Engineer Resume Examples & Samples

A thorough understanding of the current verification strategies for complex IP development, including constrained random, coverage driven and assertion-based techniques
Experience of architecting and implementing verification solutions and test benches for complex systems
Knowledge in high level verification languages, for example SystemVerilog
A good team player with a high level of pro-activity, initiative and problem solving

147

Verification Engineer Resume Examples & Samples

Bachelors or Masters degree in Computer Science or Electrical/Computer Engineering, with a GPA of 3.0 or higher
Prior design verification experience is required
Minimum of 7-10 years of work experience in design or verification of complex compute

148

SW Verification Engineer Resume Examples & Samples

To test and verify embedded SW and HW on a component level
Take part of pre-studies, analyze requirements and technical description
Develop and automate test cases
Develop and maintain the test suites in an continuous integration environment
Participate and support advanced engineering projects related to the instrument cluster or climate area

149

System Verification Engineer Resume Examples & Samples

A Bachelor degree or higher in Aero, EE or ME is required
6 to 8 years of aerospace systems development or test
Experience with embedded real time system/software development life cycle
Experience with model development using Matlab/Simulink development tools. Strong knowledge of DO178B/C “Software Considerations in Airborne Systems and Equipment Certification”
The ability to multitask on multiple programs while maintaining priorities and schedules is a must

150

Verification Engineer Resume Examples & Samples

Defining, implementing, and deploying verification capabilities, methodologies, and process improvements
Development of test plans, test bench components (BFMs, checkers, trackers, scoreboards), sequences, tests, and functional coverage
Working closely with RTL design engineers, micro-architects, and integration team members to ensure high quality of test-plans, verification environment, and tests
Strong discipline and attention to detail in ensuring effective high quality verification that minimizes bug escapes to higher levels of validation
Mentor to other team members on verification BKMs and debug
Proven, hands-on knowledge of System Verilog, OVM and object-oriented verification concepts
Strong experience with architect verification environments and components, random traffic generators, coverage-based validation and debug
Working knowledge of standard bus protocols like PCI, AHB, etc., strong understanding of logic design and computer architecture fundamentals
Experience with SIP/SoC standard tools and methodologies (Saola, ACE, VCS, etc.), C/C++ & Perl scripting
Experience in defining, implementing and deploying verification capabilities and methodologies

151

Verification Engineer Resume Examples & Samples

Define top/block level pre-silicon verification plan for analog and mixed signal circuits
Implement top/block leveltest cases with state-of-the art verification suites
Define the system partitioning and simulation strategy (transistor level, behavioral level, digital gates)
Ensure the analysis and review of the verification results

152

Digital Verification Engineer Resume Examples & Samples

Create and maintain verification plans
Choose the right verification methodology
Define verification metrics and set up (mixed-signal) verification environments

153

Lead Verification Engineer Resume Examples & Samples

You are responsible for the in-vehicle verification / validation of a significant portion of our powertrain development projects
This specific posting will initially focus on gasoline particle filter introduction
Your goal is to make sure that we satisfy customer requirements, meet quality expectations and fulfill legal requirements. And keep the development timeline
The specific project risks – as driven for example by technology, vehicle usage conditions and field experience – are analyzed by you and your functional team and then turned into a tailored verification / validation program for various types of powertrains incl. the definition of suitable tests
Coordination and monitoring of tests both regarding progress and findings. You co-operate closely with development teams and project leading functions at GM’s global development centers to turn the findings into improvements
Beyond the immediate project work, you contribute significantly to continuously improve our verification and validation approaches and methods
Academic background such as mechanical / vehicle / electrical engineering or comparable knowledge ideally with powertrain focus
Solid knowledge of automotive technology including vehicle subsystems, powertrains and their interaction. Preferably derived from extensive work in the automotive / powertrain development space
Proven skills to solve complex technical and organizational problems both with structured and pragmatic approaches as appropriate
Ability to communicate and network on various organizational levels
Beside the english language, german is required as well
Self-starter, self-motivating with a sense of responsibility
Ideally, the structures and development processes of GM vehicles and propulsion systems are known from previous assignments

154

Verification Engineer Resume Examples & Samples

HDL languages
IP block design and verification
Digital logic design and synthesis
VLSI design
Communications systems (Ethernet…)
Multimedia applications and systems (voice, video)
C/C++ programming, embedded software
UNIX scripting (C-shell, PERL)
Relevant industry experience

155

Senior Pre-silicon Verification Engineer Resume Examples & Samples

Develop verification collateral such as behavioral checkers, coverage monitors, test generators or score-boards to enable test plan execution
4+ years of experience in a relevant Pre-Silicon validation position and must have gone through multiple project cycles to gather in-depth experience
4 plus years of experience in logic design/verification with various tools and methodologies including: System Verilog, Perl, OVM/UVM, VCS/synopsys simulators, Coverage Tools
3 plus years of experience in IP or SOC verification of memory controllers, cache coherent fabric, transactional based interconnects, or RTL designs of similar complexity
3 plus years of experience creating or maintaining agents, scoreboard checkers, constrained random test sequences, and/or functional coverage buckets
Experience in Java, C, C++ is a plus

156

Principal Verification Engineer Resume Examples & Samples

Gate level simulation experience
Verification of multiple power domain designs using UPF/CPF
Emulation experience and validation of systems in the lab
Chip level bring-up in the lab
Exposure to verification of complex data/signal processing elements
Logic design experience in Verilog/VHDL

157

Nand Pre Silicon Verification Engineer Resume Examples & Samples

Must have a MS degree in Computer Engineering, Electrical Engineering and/or other related field and must have done course work or project work or work experience in the following areas
Minimum 3 months of experience High level programming language such as C++, perl, tcl - Minimum 3 months of experience Semiconductor Device Physics
Minimum 3 months of experience CMOS circuit design and verification
Minimum 6 months of experience is Semiconductor Device Physics
Minimum 6 months of experience with CMOS circuit / analog circuit design and verification
Minimum 6 months of experience NAND Flash or NOR Flash or Non-Volatile Memory

158

Verification Engineer Resume Examples & Samples

Should have 8+ years of experience in ASIC verification
Should have the knowledge of PCI Express protocol Phy, Link and Transaction layers
Good expertise in UVM based verification methodology is mandatory
Should have expertise in reviewing design specifications, creating testplans, and planning testbench architectures
Low power UPF verification experience is a plus
Knowledge of coverage tools, and Perl scripting will be an added advantage

159

Systems Verification Engineer Resume Examples & Samples

Work closely with environments team to ensure effective coverage of DevOps use cases
Communicate effectively with internal stake holders in order to deliver high quality automation
Participate in design discussions in order to create effective test strategies
Perform unit level verification of scripts used for deployment automation
Diagnose problems and report bugs and enhancements to Development
Five or more years of IT and Test experience
Familiarity with automation of operating system provisioning, configuration management, applications deployment and monitoring
Experience writing Ruby scripts to automate large scale operations using Chef or Puppet
Ability to work effectively with Development and Operations teams
Excellent hands-on technical skill and related experience
Working knowledge of QA methodology, testing techniques and approaches
A college degree in Business or Computer Science, or equivalent work experience
Deep expertise in designing, building, operating and troubleshooting Linux/Unix-based large scale Internet systems
Solid knowledge of data center operations including provisioning and maintaining of servers, networking, load balancing and other infrastructures
Experience with and understanding of OO programming and concepts (Java, C#)
Large scale web operations in Software-as-a-Service or Consumer Web
LI-KO

160

IP Verification Engineer Resume Examples & Samples

Development and execution of test-plans, test-bench components BFMs, checkers, trackers, scoreboards and functional coverage
Mixed signal behavior model development and simulation
Working closely with other analog, logic and verification engineers, micro-architects, and other team members to ensure quality of test-plans, verification environment, and tests
Provide IP integration support to SOC customers and represent IP Verification team
Provide IP training and support to post silicon EV/HVM team
Mentorship of junior team members on verification BKMs and debug
Strong problem solving capability, collaborative mindset, excellent written and verbal communication skills are critical on a cross site, fast-moving team
As part of a growing, dynamic IP team, the candidate must be successful working with a small team and manage multiple tasks and changing requirements, in an innovative environment
Scripting languages such as TCL/Perl or similar
Hands-on experience with System Verilog coding
Knowledge in SoC or large systems pre-silicon and post silicon verification
Object-oriented programming knowledge C++, System Verilog Test-bench component development preferably in OVM, and test debugging skills Computer Architecture design Knowledge is required
Strong discipline and attention to detail in ensuring high quality verification that minimizes bug escapes to higher levels of validation

161

Verification Engineer Resume Examples & Samples

Understand the product requirement
Work with design and micro-architecture team to develop the verification environment and test plan
Create and maintain transactors, checkers, interfaces and tests
Create and modify tests as per the plan
Debug and report design issues; create status reports for verification progress
Analyze and develop new tests for coverage
MSEE/MTech/BSEE/BTech with 8+ years in functional verification
Experience in planning the verification process and creating realistic schedule estimates
Experience in High Level Verification languages: System Verilog is a must
Strong experience in high level Object Oriented test bench environments such as UVM or any equivalent
Experience writing test specifications (plans) and creating directed and random test cases
Experience in developing constrained random verification environment
Experience managing regression analysis
Experience in reviewing and critiquing of test bench and test plans
Strong debugging skills of Verilog RTL & test environment is desired
Able to adopt the use of new techniques and methodologies and promote their use within the team
A high level of pro-activity, self-organized and problem solving ability
Experience with assertion based verification is preferred
Experience with scripting languages such as PERL, TCL Unix Scripting is highly desirable

162

SoC Verification Engineer Resume Examples & Samples

8 -12 years of experience are required in the following areas
ASIC/SoC Design Verification
Using latest Verification methodologies such as System Verilog, and UVM
Knowledge of PCIE Express protocol
Working knowledge in one or more of the following: C, C++, Python, TCL or Perl
Background in scripting for automation of design methodologies & flows
Knowledge of AMBA bus protocols especially CHI is highly desired - Experience in system bus with QOS, cache coherent bus and bridge unit verification is highly desired - Direct and relevant experience with multi-CPU core SOC solutions - ARMv8 processor architecture understanding and knowledge - Broad experience in SoC development from design concept through silicon bring-up

163

Principal Verification Engineer Resume Examples & Samples

Experience of coverage-driven constrained random verification
Excellent communication and written skills in English
Ability to provide leadership and technical support to other engineers Experience of delivering products as part of a team
Self-motivating and willing to accept new challenges
Experience of formal verification
High-level programming experience such as C/C++

164

Senior Verification Engineer Resume Examples & Samples

4+ Years of engineering experience verification (CPU Verification/ CPU based SoC Verification)
Basic understanding of Multicores / Virtualization
Basic understanding of Operating System internals

165

Senior Verification Engineer Resume Examples & Samples

Good University Degree in ECE or Computer Science. Other Science graduates would be considered if they have relevant work experience
3+ years of engineering experience in CPU verification or CPU based SoC validation
Strong understanding of CPU and/or SoC architecture is a must
Good understanding of digital design concepts, experience with RTL design in Verilog, or System Verilog is a plus
Strong understanding of System level Integration and SoC verification/Validation
Good understanding of random verification methodologies
Good in logical programming using C/C++/Assembly
Working knowledge of Industry standard verification tools for simulation and debug
Some hands on experience on HW acceleration platforms like Emulation and FPGA
Good understanding of verification best practices such as Test Plan development, Testcase development and measurable execution thereof
Knowledge and use of scripting and scripting languages like Perl/Python/Shell
Exposure to HVL based verification, Specman-e / System Verilog / Vera
Experience in testbench design and development for IP or SoC
Knowledge of advance verification techniques like Assertions, property checking, Formal
Experience of ARM based System Design and/or Validation
Experience in CPU Architecture verification and a desire to grow further in this area

166

Verification Engineer Resume Examples & Samples

Verification planning and specification development
Development verification environments from unit level up to SoC level
Development and debug of UVM and bare meta C test cases
Achieve very high levels of verification coverage to detect bugs and ensure first-pass silicon success
Experience of coverage-driven constrained random test environments
A demonstrated keen interest in how computers work, including processor design concepts
High-level proactivity and initiative
The ability to effectively work alone as well as in a team
Fluency in both written and oral English
Experience of SystemVerilog
Experience of SoC level verification
Familiarity of Unix/Linux working environment

167

IP Verification Engineer Resume Examples & Samples

Create comprehensive verification and validation plan based on IP/FPGA architecture specifications and carry out all the IP validation tasks. The plan encompasses functional, system level and hardware verification and validation perspectives
Developing IP/subsystem/system level testbench, create tests, and necessary coverage goals based on specification to verify the implementation. Writing directed and random test cases, debugging failures, filing and closing bugs
Review verification and validation results against the coverage goals. Writing, analyzing and achieving coverage metrics
Work with cross-functional teams and prepare/support IP functional validation tests for IP bring-up on actual FPGA development kits
Build IP FPGA emulation prototypes, creating and establishing IP subsystem/solution validation coverage strategy and standardized framework, drive system test design implementation and overall IP system validation on HW, maximize FPGA hardware capability to bring substantial improvement to IP quality & usability for Intel FPGA IP product portfolios
Developing verification and validation tools and flows, as needed
Apply advanced techniques to achieve verification and validation with the highest quality, productivity, and time-to-market
Provide practical, innovative solutions to complex problems

168

SW Verification Engineer Resume Examples & Samples

Being a team player as part of a Development Scrum Team
Test Design for the team deliveries from the 1st stage of the feature definition and Design
Participate actively in the Development Design Reviews and challenge the development from the testing perspective
Execute the test scenarios manually and develop its automation
Develop the test environment and sets up regression and integration tests, as well as verification and acceptance tests, as required in the projects
Work, think and act as a System tester with other Development teams to improve the product testability and quality
Analyses test results, analyses the cause of errors, and gives feedback to the Developers, System Engineers and Product Owners
Report and track defect using Defect Management tools (TFS, ClearQuest)

169

Senior Verification Engineer Resume Examples & Samples

Verification of architecture and low-level hardware functionality
Architect and Create verification environments using Systemverilog and Universal verification methodology-UVM for networking chips
Work on complex issues where analysis of situations or data requires an in-depth evaluation of variable factors
Will champion significant projects, programs and business initiatives using demonstrated creativity and ingenuity
Escalation point for complex issues
Coaches and mentors other junior team members

170

Principal Verification Engineer Resume Examples & Samples

5+ year working experience of PCIe protocol knowledge
NVMe protocol knowledge is a plus
7+ year Working experience in IP / SoC verification using UVM, OVM or System Verilog
Experience in developing block/system level verification plans and tests
Must have capability to debug test failures to find the root cause
Experience in code / functional coverage
Experience in constrained random testing
CAD Tools : Synopsys/Cadence/Mentor

171

SoC Verification Engineer Resume Examples & Samples

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and program
Education – BS in Electrical Engineering
8 years of relevant experience in the industry
Language Fluency – Fluent in English Language (written & verbal)
MS in Electrical Engineering preferred
Experience in SOC level (rather than block level) verification of ARM-based SOCs
Proficient in writing and debugging tests in UVM as well as C
Experience with industry standard interfaces such as DDR, PCIE, Ethernet, and USB
Experience with assertion-based formal verification tools

172

Lead Verification Engineer Resume Examples & Samples

Define verification strategy. Drive and approve formal verification phase
Support and interact with other teams for verification, integration, validation and post validation. Problem solve and take feedback into the next improvement cycle. This includes close coordination and collaboration with cross-functional and other verification teams
Coordinate verification activities over multiple teams or global locations
Drive process improvement and verification efficiency
Bachelors of Science or equivalent degree in a Scientific/Engineering discipline
5+ years experience in an engineering test environment, beyond the educational requirement
2+ years leading test efforts
Demonstrable clear oral communication, as well as well-organized documentation skills; excellent command of written and spoken English
Experience in an environment that tests the interaction of complex systems
Familiarity with modern verification methods
Exposure to Verification tools and their methodology: e.g., Quality Center, TestComplete, DOORS and ClearQuest
Demonstrated ability to drive test strategy and lead project activities
Capability to develop automation scenarios in area of domain expertise, and ensure test output delivers a reliable report for the purpose of test evidence
Demonstrated ability to work and contribute in a team environment
Demonstrated capability to conduct and lead technical reviews of verification elements
Experience with hands-on integration or verification

173

Verification Engineer Resume Examples & Samples

Lead verification deliverables as required on a per project basis
Ensure requirements are scoped to the proper level of detail and are testable
Maintain automation of scenarios in area of domain expertise, ensure test output delivers a reliable report for the purpose of test evidence

174

Senior Verification Engineer Resume Examples & Samples

Testing and debugging Verilog RTL
Driving the unit team to ensure the quality of the design work done along with on time delivery
Experience of verifying complex RTL designs
Professional approach to work
Self motivated and willing to accept new challenges
Good understanding of computer system architecture concepts
Coverage driven verification using SystemVerilog
Experience of UVM, OVM or VMM Methodology
Formal verification techniques
Verilog or SystemVerilog RTL design experience
Knowledge of AMBA or other bus architectures
Ability to provide leadership and technical support to other engineers

175

System Verification Engineer Resume Examples & Samples

Software verification for electro-mechanical steering systems (EPS) – integration tests, scenario based tests
Analysis of technical software specifications, system requirements and software architectural requirements
Development of test suites and test cases according to verification criteria using C programming language
Design, development and maintenance of SW and System Test and Validation infrastructure
Working with tools supporting verification of embedded software, e.g. compilers, test frameworks, modeling/simulation tools
Master’s degree or master level student with background in electronics, computer science, telecommunication or mechatronics
Experience with embedded SW development or testing using C programming language
Experience with SW build tools and scripting languages (make, Perl, Python, bash, etc.)
At least basic understanding of electronic circuits and embedded systems
Experience with using measurement equipment is an advantage
Knowledge/experience with other programming languages than C is an advantage
Knowledge/experience with UML is an advantage
Experience within automotive industry is an advantage (including AUTOSAR, ISO 26262 and SPICE)
Analytic and problem solving capabilities
Pro-activity, self-organization and ability to work under pressure
Good communication skills and cross-cultural competence
At least intermediate command of English, German will be an advantage

176

Senior Verification Engineer Resume Examples & Samples

Good university degree in computer science or ECE, preferably in Computer Science
8+ years of engineering experience in verification domain in CPU or CPU based SoC
Strong understanding of Application Profile CPU architecture is a “must-have”
Understands latest DV tools/technology trends and ability to apply that knowledge in work
Have handled initiatives which impacts multiple projects related to efficiency, quality and infrastructure
Extensive cross site experience
Strong ARM architecture knowledge

177

RF Component Verification Engineer Resume Examples & Samples

B.Sc. or M.Sc. degree in Electronics or Telecommunication or equivalent
Previous experience in RF receiver circuit and block-level component verification as well as the troubleshooting of such blocks is an advantage
Experience of Receiver KPIs NF, IIP2/IIP3, EVM, etc. is an advantage
Strong willingness to learn and want to be employed in a demanding field of work
Ability to work in a team, as well as a single contributor
Strong programming skills e.g. C, C++, LabView, Matlab, Python, Excel, VBA, etc
A very good command of the English languages. German language knowledge in an advantage

178

Verification Engineer Resume Examples & Samples

Develop specifications and/or test cases on module and sub-system level
Perform hands-on functional system and/or physical verification of chromatographic systems and bioreactors (separate modules, cpl instrument and software)
Perform studies of development and/or market support character
Independently plan and accomplish given tasks from Project Manager or Section Manager, to reach given project objectives
Independently solve problems of "trouble shooting character" in project and/or line related work
Report and present results orally and/ or in writing
MSc or BSc within Technical Physics/Biotechnology or similar
Documented experience of product development work
Knowledge and interest for equipment and software for measurements and analytics
Interest in lab equipment i.e. climatic chambers as well as working with new investments and keeping the equipment calibrated
Knowledge in statistics, Weibull analytics and DoE
Hands on, practical, driven to in a short time frame deliver accurate test results in a technical report,
English as working language
Curious, outgoing and good interpersonal skills
Excellent in personal planning and ability to plan, execute and follow up activities
Excellent computer skills and ability to work in both general and internal systems
Ability to quickly learn new areas and work as the sole representative from the section in various projects/tasks
Swedish as working language
Structured and systematic ways of working
Able to represent the section in technical discussions/issues
Ability to work independently, alone as well as with others
Theoretical knowledge and practical experience regarding protein purification
A genuine interest in instrument development
Experience from the ÄKTA platform and knowledge in relevant regulatory directives

179

Digital Verification Engineer Resume Examples & Samples

Experience in SoC level verification
Implementation of a regression environment which runs on committed database release including writing models , scripts
Netlist verification (post layout simulation: 0 delay, SDF simulations)
Hardware-software verification (incl. test firmware)
Good know ledge of digital design
Awareness of best practices adopted in verification
Defined and executed testcases at module level
Experience in integration verification of external IPs at SoC level
Experience in one or all of the listed topics: UVM, formal verification, mixed signal simulations. Possible training on these topics are not an issue
Expertize in UVM is a MUST
Good team player eager to develop best in class products

180

Pre Si Verification Engineer Resume Examples & Samples

Strong initiative, teamwork, planning, and communication abilities as he/she will be driving verification capabilities and requirements impacting multiple projects
Excellent verbal and written communications skills as well as ability to be results oriented in a team environment
Bachelors in Electrical engineering/ computer engineering with 6 years of experience or Masters in Electrical Engineering/ computer engineering with 4 years of experience
Strong experience with architecting verification environments and components, random traffic generators, coverage-based validation and debug
Experience with SIP/SoC standard tools and methodologies Saola, ACE, VCS, etc., C/C++ & Perl scripting
Experience in high speed interconnects like Memory/ imaging or logic subsystem design and controller design is a huge plus

181

Lead Verification Engineer Resume Examples & Samples

Architect and implement simulation test bench in UVM
Own and debug failures in simulation to root-cause problems
Closely work with logic designers of the block being verified for test plan development, execution, debug, coverage closure and gate level simulations
Coach and mentor junior engineers of the team when necessary to achieve successful project outcomes

182

Lead Verification Engineer Resume Examples & Samples

Write a verification test plan using random techniques and coverage analysis, and work with designers to ensure it is complete
Develop tests and tune the environment to achieve coverage goals
Debug failures and work with designers to resolve issues
Transform the requirements from the engineering teams into software tools that are both easy to use and scalable within a highly parallel compute environment

183

System Verification Engineer Resume Examples & Samples

Investigate and verify key components og the 4G and 5G area - resulting in submitting new requiremenst and improvements
Develpop automated testing for continuous integration
Design and code new tools
3GPP protocols
4G and / or 5G network topology
Java or TestNG and / or Python or Perl
Verification of cloud based systems

184

Verification Engineer Resume Examples & Samples

Design test cases for both automated and manual testing
Raise defects for product non conformance
Participate in technical reviews and contributing to technical discussions
Contribute in decision making for make/stop a release
Report out defects in products & design
Maintain development infrastructure needed for testing
Provide help on tool validation
Developing and re-factoring Test Automation environment
Graduation in Technical/SW Engineering/Engineering/Medical field
Solid work experience in testing
Very good knowledge of software testing methodologies/processes and software development life cycle
Strong in Manual/Automated testing methodologies
Sound knowledge of application architectures and databases
Work well with teams and across global environment
Legally authorized to work in Finland full time
Previous experience on testing medical products
Understanding in the medical business and patient monitoring products
Demonstrated skills in understanding the requirements for Good Documentation Practices
Motivation and interest in developing medical technology
Knowledge in GE Healthcare engineering tools and processes
Working experience with cross cultural teams

185

Verification Engineer Resume Examples & Samples

Verify functionality of high performance memory sub-system at the unit and/or sub-system
Develop and execute test-plans for verifying correctness and performance of the design
Closely work with logic designers of the block being verified for test plan development, execution, debug and coverage closure
Self-motivated team player able to thrive in a fast-paced engineering environment

186

Senior Verification Engineer Resume Examples & Samples

Substantial experience of RTL verification for complex ASIC products
Proficiency in a hardware verification language, preferably System Verilog / UVM
Experience producing specifications and documentation describing complex designs
Some team leadership experience, including planning and managing tasks
Expert Tools knowledge in one or more of the following – Synopsys VCS, Cadence Incisive , Mentor Graphics Questasim
Excellent RTL Debug ability
A strong mathematical background including a working knowledge of Matlab , C/C++ or Python, ideally in the context of work with bit-accurate models

187

Senior Verification Engineer Resume Examples & Samples

Be one of the RIS experts supporting the design verification across the globe to help ARM achieve its design goals
Evangelize RIS technology across ARM Processor Group and external partners
In-depth knowledge of processor architecture
C/C++ knowledge beyond the introductory level
Exposure to assembly language programming
Familiarity with scripting languages such as Perl or Python
Experience in IP verification and methodologies, preferably processor verification skills

188

Senior Systems Verification Engineer Resume Examples & Samples

Assist with and lead testing projects including estimation, planning, coordination, project deliverables, and directing the day to day tasks of others
Work independently and as a team member to plan, write, and execute test cases according to internal processes, FDA regulatory, and ISO standard procedures
Participate in the requirements, hazard analysis, and design reviews for new features
Display initiative, leadership and coaching skills including continuous quality/engineering process improvement, project leadership, and team training
Evaluate, recommend, and employ system tests tools to ensure system quality
Design new test suites for new features and functionality
Provide verification and validation perspective to R&D’s ongoing product development
Minimum of five years of relevant work experience including system-level test development
Understanding of hardware-software systems, requirements leveling, and interface requirements
Experience working in the medical device industry or other highly regulated industry
Demonstrated ability to develop new methods for characterization of system performance and verification of system functionality
Demonstrated ability to understand and comply with applicable FDA regulations and Company operating procedures, processes, policies and tasks
Ability to work within a cross-functional team and as an individual contributor in a fast-paced, changing environment
Current industry knowledge of electrophysiology and/or cardiac rhythm management products
Experience with Labview, C++, Perl, and Python programming languages
Experience with robotics, control systems, and/or motor controllers

189

Senior Verification Engineer Resume Examples & Samples

This position will support the Software Team in its Advanced Engineering, New Product Development and Product Maintenance efforts at the Shippensburg, PA facility. Specific responsibilities for the candidate are
Produce software test cases by analyzing functional requirements
Executing test cases on HIL rig and on machine
Develop automated test suites for HIL rig
Collaborate with and support software developers and verification engineers
System level requirement breakdown according to System Engineering principles
Coordination of activities with other Scrum teams and departments
Troubleshoot system level machine issues
Contribute to team success through Scrum methodology – willing to take on new assignments
Cooperate with specialists on related technologies
Maintain a network with specialists and architects on other sites and in adjacent disciplines
Prepare written reports or presentations on completed work
Understand and execute our software development process
10+ years of experience with a minimum of Bachelor of Science in Engineering (BSEE, BSCE) or foreign equivalent
Experience with version and configuration management
Experience with vehicular electrical & electronics systems design
Demonstrated successful experience in software verification for construction equipment or heavy duty vehicles
Demonstrated successful experience working in a global development environment
Experience in agile development methods
Experience in Systems Engineering
Hands On
Labview
CANalyzer
Green Hills (preferred)
C / C++ (preferred)

190

Verification Engineer Resume Examples & Samples

Verification planning
Understands and analyzes RTL code, functional, assertion coverage results
FPGA/Emulation/Prototyping using HAPS/Palladium/Zebu would be an additional advantage

191

Verification Engineer Resume Examples & Samples

Lead and plan the independent verification effort for safety-critical and high-reliability systems
Plan, implement, document and maintain solutions for the integration and test of product
Develop detailed verification plans and test procedures
Review, evaluate, and derive requirements for testability
Lead the development of early-verification solutions (Rapid-Prototyping, simulation, modeling, etc)
A passion for innovation, an understanding of test equipment and electronic systems, and the ability to further advance L-3 Communications Cincinnati Electronics technology
Ability to lead the development of electronic-intensive test set solutions
Ability to design, test and troubleshoot digital and analog systems
Ensure that all engineering related internal processes (see below) are followed by the project design team

192

Senior Systems Verification Engineer Resume Examples & Samples

Provide verification and validation perspective to R&D’s ongoing product development: requirements, product and test designs, defect reviews, user workflows, and field complaint investigations
Maintain expert status and continuing proficiency in the field of system test engineering
Master of Science or equivalent in Systems Engineering, Electrical Engineering, Computer Science, Computer Engineering

193

AMS / RF IC Modelling & Verification Engineer Resume Examples & Samples

Understanding of specifications and protocols which can be typically found in a Customer Requirement Specification
Experience in the matlab language
Being able to write end 2 end matlab model of a complex transceiver
Good understanding of digital signal processing
Being able to understand an electrical schematic
Experience in Verilog AMS WREAL Language Modelling and Simulation of analogue circuits
Being able to work in a multi disciplinary team
Being fluent in speaking and writing of the English language

194

Analog Verification Engineer Resume Examples & Samples

Develop VerilogAMS models for inclusion into self-tested test benches for Mixed Signal chips and sub-circuits
Develop and integrate the AMS and DV verification plans into one Master verification plan
Work cross functionally with Design, Applications and Test engineering to insure that the end product is robust
Work diligently to accomplish project goals and meet schedule requirements
Drive towards continuous personal, team, project and Company improvement

195

SoC Verification Engineer Resume Examples & Samples

5 or more years experience in SoC Verification including
Experience and skills in HVL coding (SystemVerilog)
Experience with scripting languages (Perl, Python)
Experience in Assertion-based verification/Formal verification
Familiarity with VMM/UVM verification methodologies

196

Verification Engineer Resume Examples & Samples

Good knowledge of verification methodologies
VHDL, Verilog and System Verilog
Understanding of hardware design, demonstrated by experience in the field
Tools knowledge in any of the following – VCS, Cadence NC, Atrenta Spyglass, Modelsim
Debug experience
FPGA, Synopsys DC and C, C++Perl, Python, tcl
Assertion based verification
Formal verification
Previous experience of system level verification in a commercial development environment is essential
The successful candidate will be able to demonstrate having produced or contributed to customer facing verification reports
Previous experience working in a hardware design function before moving into verification is required

197

Senior Verification Engineer Resume Examples & Samples

Understand ARM architecture specifications and compliance product
Enable smooth deployment of the ARM Architecture Compliance Kits at the partner end
Stakeholder management and strong and continuous communication on deliveries and risks and ensure that all engineering commitments are delivered successfully
Interact with internal and external customers to understand their issues and resolve them with a sense of urgency
Participate or Own debug and resolution of failures reported by Partners
Proactively contribute in product improvement and enhance customer experience
Track and monitor key customer metrics and provide management regular updates
Good University degree in Computer Engineering/Computer Science or Electronics Engineering. Other candidates will be considered if they have relevant experience
4+ Years of engineering experience primarily focussing on the processor domain
Experience in the Microprocessor domain. Familiarity with ARM (or x86) architecture or micro-architecture
Experience in at least one programming language or assembly or any scripting languages (C, ARM assembly, Perl)
Excellent communication skills and customer facing experience
Working knowledge of RTL Simulation environments
Exposure to ARM based system designs

198

Digital Verification Engineer Resume Examples & Samples

Modeling analog and RF behavior using the SystemVerilog language
Support various tools such as Spectre, VerilogAMS, Ncsim/irun/vcs, and Modelism
Write programs in Python and TCL
Manage radio projects from definition, verification, bring up and ATE
Write synthesizable verilog RTL for digital circuits in radio
Provide verification for digital IP blocks
Work on top level Radio verification and simulations
Implement verification for digital IP blocks
Generate top level Radio verification and simulation states

199

Verification Engineer Resume Examples & Samples

B.Sc. in Computer Science or SW/Computer Engineering
Good programming skills in C/ C++/ Python
Knowledge in Linux/VMware is a plus
Experience is an atvantage

200

Digital Advanced Verification Engineer Resume Examples & Samples

2+ years of verification engineering experience (0 years with an MS)
Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog)
Knowledge of UVM

201

System Verification Engineer Resume Examples & Samples

5+ years’ experience in system or software design verification
3+ years working in a Medical Device/Design Controls environment
2+ years’ experience leading a verification team
3+ years’ experience testing in a Windows desktop and server environment
Experience working with distributed/offshore teams
Bachelor’s degree in science or engineering
Experience and proficiency reviewing software requirements for testability
Working knowledge of global and FDA medical device regulations, requirements, and standards as they apply to software V&V
Ability to think outside of the box on how non-functional requirements can impact functional requirements
Experience with Software Lifecycle Development test tools such as Microsoft Test Manager or Rational Quality Manager
Experience writing, maintaining, and controlling test protocols, execution records, and test reports
Proficiency with MS Office applications (Word, Excel, Power Point, and Project)
Master’s Degree in a related field
ASQ certification as Certified SW Quality Engineer
DfSS Green Belt / Black Belt
Familiarity with HL7 messaging
Test automation experience

202

Digital Verification Engineer Resume Examples & Samples

Be responsible for the verification of integrated digital and mixed signal circuits in bipolar and BCD technologies
Define necessary test benches and perform the checks
Assure quality of the design and execution quality
Guarantee quality of deliverable (documentation and verification report)
Understand how own work integrates within the corresponding function, with focus on own work team
Be responsible for the technical documentation such as verification plan and verification results

203

AMS / RF IC Modelling & Verification Engineer Resume Examples & Samples

Specifications and protocols which can be typically found in a Customer Requirement Specification
The matlab language, you will need to partcipate developing end 2 end models of our system
Analog and digital signal processing, as well as mathematics
Electronics and circuits
Verilog AMS WREAL Language Modelling and
Analog circuit simulations
English, both in writing and speaking

204

EE SW Verification Engineer Resume Examples & Samples

B.A. / BSc. In Computer Sciences with grades average above – with excellence
Over 2 year experience as SW Automation Engineer
Vast Programing Knowledge in the following languages: Bash / Python / other OOP

205

Systems Verification Engineer Resume Examples & Samples

TD-LTE and LTE-FDD procedures
Strong knowledge and background in telecommunications & wireless domain
Up to 10-15% travel required

206

Senior Verification Engineer Resume Examples & Samples

Perform Data Analysis on the test execution output files to generate plots, charts, reports, spreadsheets, presentations etc
Develop Testing Infrastructure to auto-test ECU functional requirements within a real-world Vehicle Level environment
Perform bench level tests, create reports, create defects and review them with the Verification Project Lead
Support the selection and design of new test equipment such as HILs, RCP systems and custom Test Properties
Develop and provide test infrastructure user instruction manual and training, as required, to the crossfunctional team
Bachelor’s degree in Physics / Optics / Systems Engineering / Electrical Engineering or equivalent (Master’s preferred)
National Instruments and tools
5-10 years’ relevant experience regarding the Responsibility / Activities (listed above) in serial development. Automotive electronic (mandatory)
Camera optics performance, design, specification and testing
Knowledge of product development engineering practices in automotive field
Revision control
Change control
Requirements decomposition planning and reporting
Test plan, test sequence and test parameters developmentTest execution planning
Track records of writing good requirements that can be successfully implemented
Profound technical knowledge of automotive electronics products. Familiar with typical automotive OEM requirements
Can anticipate customer requirements, even if not stated in customer documentation
Experienced in use of requirements management tools
Knowledge of structured problem solving (8D) methods and/or techniques

207

Digital Verification Engineer Resume Examples & Samples

Main resposible on IP level, subsystem level and SoC level verification for connectivity MCU, MPU which targets IoT application. the verification work includes develop test benches, modeling, assertions/checkers/monitors, test plan and test development and sign off for tape out
Support the IP and SoC design, architecture definition
Join the verification methodology innovation

208

Principal Verification Engineer Resume Examples & Samples

Development of verification test bench components such as drivers, monitors, response checkers as well as use most advanced UVM VIPs
Understands and develops system Verilog assertions
Strong skills in debug, failure re-creation and root cause analysis
C/C++/Assembly Language Programming skills in ARM A/R/M series, PPC
NIC/FlexNOC interconnect with Cache coherency ,/DDR3/LPDDR4/Flash memory subsystem architecture knowledge
Communication Protocols like LIN, CAN, FlexRay Graphics/Multimedia/Networking IPs like PCIe, MIPI, GPU, H.264, Ethernet, USB, ITU T.656, DSP, Image/Computer Vision, RADAR processing
Formal verification methodologies, AVIP
Test pattern debugging and testing for verification and automatic testers

209

Verification Engineer Resume Examples & Samples

3+ years industry hands-on experience in ASIC design/verification
Bachelor/Masters/PhD Degree in Electronic/Computer Engineering
Strong understanding of, and direct experience in the development of verification environments and methodologies at block and chip level
Extensive knowledge of SystemVerilog / Verilog / VHDL
Good problem solving skills and ability to analyse and debug RTL design issues
Ability to work well as part of a team
Experience with state of the art of verification techniques - constrained random stimulus generation, assertion, functional coverage - and using verification methodologies such as OVM/UVM/VMM
Good understanding of Object-Oriented programming concepts
Experience with one or more scripting languages - Python, Perl, TCL/TK, Shell scripting
Good understanding of Digital Signal Processing

210

Formal Test Verification Engineer Resume Examples & Samples

The candidate must have a background in system test or software/hardware engineering and be able to work closely with the software development team to understand, define and write test procedures and create test artifacts using Agile processes
This position requires a team-oriented disposition, working knowledge of Agile software development concepts, ability to work multiple tasks concurrently, and strong documentation and communication skills
Bachelor's degree in technical discipline with a minimum of 5 years related experience. 4 additional years of experience can be substituted for the degree
US citizenship required. Must be able to obtain and maintain a secret security clearance

211

Modeling Verification Engineer Resume Examples & Samples

Oversees definition, design, verification, and documentation for SoC System on a Chip development
Determines architecture design, logic design, and system simulation
Defines module interfaces/formats for simulation
Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs
Performs all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing
May also review vendor capability to support development
The suitable candidate must be graduated of bachelors degree of Science in Computer Science, Computer Engineering, or Electrical Engineering
6 months experience with SoC

212

Senior Verification Engineer Resume Examples & Samples

Experience in architecturing, implementing, and utilizing UVM environments; OVM, VMM, and similar standards experience is a plus
Strong C/C++, SystemC, SystemVerilog, and Python experience
Strong working knowledge of SystemVerilog tools such as VCS, etc
A strong knowledge of DRAM, NAND, and other memory systems through academic coursework as a minimum; direct experience is preferred
Exposure to various bus protocols (AMBA, CoreConnect, OCP) and network on chip
Ability to quickly react and adapt to changes based on customer issues
Exposure to software development practices
Excellent problem solving and troubleshooting skills
Excellent organization skills and self-motivation
Ability to be a strong individual contributor as well as a team player

213

Verification Engineer Resume Examples & Samples

Development of metric driven verification solutions
Work with best in class tools and implementation of verification frameworks/environments to verify complex mixed signal designs
Collaborating with the digital and Analog design teams to deliver complete verification solutions
1+ years industry hands-on experience in ASIC design/verification
Knowledge of SystemVerilog / Verilog / VHDL
Experience with state of the art of verification techniques - constrained random stimulus generation, assertion, functional coverage - and using verification methodologies such as UVM
Understanding of, and direct experience in the development of verification environments and methodologies at block and chip level

214

Nand Pre Silicon Verification Engineer Resume Examples & Samples

Problem-solving, data analytical and methodological thinking
The suitable candidate must be graduated of Master or P.hD degree of Science in Computer Science, Computer Engineering, or Electrical Engineering
6 months experience and understanding of Verilog / System Verilog design and verification
6 months experience with the programming language such as C++, PERL, TCL
6 months experience with Logic and Mixed-signal simulation/verification
6 months experience with Unix environment
6 months experience with Microsoft Office tools
6 months experience with Semiconductor Device Physics
6 months experience with CMOS circuit / analog circuit design and verification
6 months experience with NAND Flash or NOR Flash or Non-Volatile Memory

215

Verification Engineer Resume Examples & Samples

Experience on design verification and validation
Knowledge on CBTC systems will be an added advantage
Work experience on System data table/Control Table, Scheme Plan/platform documents
Participation in planning, development, design, verification, T&C of signalling systems
Experience in handling projects independently
Overall project life cycle management

216

Component Verification Engineer for Mixed Resume Examples & Samples

Define component verification concepts(hard- and software)
Be responsible for effort estimations
Develop hard- and software for measurement test benches
Execute measurements
Interpret measurement results

217

Analog DFT Verification Engineer Resume Examples & Samples

BS in Electrical & Electrical Engineering (BSEE) with 5 years of industrial experience
Experience with System Verilog Test-bench & UVM
Good understanding of SoC System Level Architecture
Experience with Matlab/C/C++
MS in Electrical & Electrical Engineering (MSEE) with 5 years of industrial experience * Knowledge of some Analog/MSIP design and/or Modeling is preferred * Experience in Post-Silicon Bring Up & ATE support

218

Formal Verification Engineer Resume Examples & Samples

Prior experience in functional verification or digital hardware design
Familiarity with formal methods (e.g. SVA, PSL, model checking, theorem proving)
An engineering mind-set and passion for digital design
Understanding of fundamental verification concepts
A keen interest in processors and digital systems
Understanding of computer architecture & micro-architectural concepts
Knowledge of hardware description and verification languages, such as VHDL, Verilog/SystemVerilog, PSL
Strong reasoning skills
Ability to understand and map abstract formal concepts onto designs
Creativity and ability to communicate ideas effectively
Good inter-personal and teamwork skills
Proficiency UNIX environment and shell programming/scripting
Familiarity with industry-standard formal verification tools
Understanding of the end-to-end verification processes, from test plan creation through to verification closure
Familiarity with ARM architecture and instruction set
Familiarity with model-checking techniques
Exposure to invariants and abstractions
Understanding of assume-guarantee reasoning

219

Principal Verification Engineer Resume Examples & Samples

Competency in hardware verification languages, preferably Verilog and System Verilog / UVM /e
Understanding of the fundamentals of computer architecture and system on a chip designs
International travel to UK/US and APAC regions
Practical experience of working on microprocessor or complex system interconnect and peripheral designs
Some team lead and/or management experience
Genuine passion for technology, actively following emerging technologies and trends

220

Senior Verification Engineer Resume Examples & Samples

Object Oriented programming concepts
A thorough understanding and experience of the current verification strategies required for complex SoC development, including software based techniques
A good understanding of ARM System Architectures
Low-level programming experience including C and Assembler
Expertise of Verilog and SystemVerilog and verification methodologies – UVM/OVM/e
Perl , Python or other scripting language
Testplan creation and tracking
Ability to express ideas and communicate effectively in English
A high level of pro-activity, initiative and problem solving
Enthusiasm, drive and the ability to schedule own workload and plan tasks effectively
Power aware verification
Clock domain crossing verification
Porting peripheral driver software
Linux used for system validation
Hardware emulation / acceleration

221

Senior Verification Engineer Resume Examples & Samples

Experience of system level and block level RTL verification FPGA/ASIC developments
Practical experience of working on IP verification
Proficiency in scripting languages, e.g. Perl/TCL/Python
Ability to work as part of a global team

222

Verification Engineer Resume Examples & Samples

Bachelor or MS in Computer science and Engineering or Electronics and Electrical engineering back ground
2 (Bachelor)/ 1 (Master) years of experiences in pre-silicon validation of SoC, processors or System IPs
Experience of developing hardware system/SoC & validating the systems
Creation of directed validation/regression test suite targeting CPU, GPU and other IPs in a SoC
Knowledge and use of ARM assembler or GCC assembler
Experience of complex CPU architecture features and their corresponding interactions, especially relating to caches, MMU, SMP, coherency and out of order execution
Self-motivated with a flair for lateral thinking and problem solving
Excellent written and spoken communication skills, professional approach to work and willingness to accept new challenges

223

Verification Engineer Resume Examples & Samples

University degree in ECE or computer science
2+ years of engineering experience in verification domain in CPU or CPU based SoC
Knowledge of CPU architecture is a “must-have”
Understands digital design concepts
Experience at C/ASM testing, functional and/or power verification
Have successfully worked with industry standard DV tools
Basic knowledge of HVL, coverage, scripting
Have successfully executed tasks as per DV plan requirements
Can understand, plan and define DV tasks (Desirable)
Experience with test plan and test-bench development using System Verilog (Desirable)
Experience with current verification methodologies like UVM, OVM, VMM and Specman (Desirable)

224

Verification Engineer Resume Examples & Samples

RTL verification
The basics of hardware design and/or verification languages
Knowledge of microprocessor or peripheral designs
Some experience in scripting languages, e.g. Perl/TCL/Python
Knowledge of verification and design for verification techniques

225

Senior Systems Verification Engineer Resume Examples & Samples

Participates on project teams to develop clear system specifications, feasibility plans and reports and system integration tests
Analyze system and software/firmware requirements to determine testability, completeness and consistency
Design Test cases, Test Strategies and Test Procedures to evaluate the behavior of the software/firmware as compared to the specified requirements
Frequent use and application of technical standards, principles, theories, concepts and techniques as they relate to Software Testing
Providing solutions to a variety of technical problems of moderate scope and complexity
Develop system models and simulation artifacts to understand the system behavior, system performance or technical attributes
Support system risk management activities, Use/Design FMEA’s, risk/hazard analysis
Support regulatory submissions of specifications, test plans, and reports
Supports field staff and quality engineers during troubleshooting and failure analysis of equipment
Works under general supervision. Work is reviewed for soundness of technical judgment, overall adequacy and accuracy. Contributes to the completion of milestones associated with specific projects
Knowledge of SEIT (Systems Engineering Integration & Test) roles and functions, including requirements management, functional analysis, interface definition, synthesis and verification
Extensive technical knowledge of advanced testing concepts and formal Software and Systems Verification strategies for regulated Software, preferably in the Medical Device Industry
Excellent verbal and written communication skills and the ability to positively influence individuals and groups
Strong problem solving skills in a team environment
Knowledge of both Manual and Automated Testing Tools for Application Software as well as Embedded Systems
Understanding of hardware design and trade-offs, embedded (real-time) software tradeoffs, performance and redundancy issues
Knowledge of Software and System Architectures, Software Engineering Best Practices, and programming and scripting languages
Understand SW/HW systems and be able to test for the types of failure modes associated with these systems
Experience using configuration management, requirements management, issue tracking systems
BS/MS in Computer Science, Electrical Engineering, Biomedical Engineering or related field (or equivalent experience)
5+ Years’ experience in Systems Engineering, Software Development and/or Software V&V
Evidence of continuing education in technology improvement, advanced product development tools and processes
Experience in the Medical Device industry (or other regulated environment)
2+ Years experience programming in Scripting Languages (preferably PHP or Python)
3+ years Experience in writing Automated Software Test Scripts for Embedded Systems
Ability to read, understand and/or write C++, C# Code
MS Visual Studio
LabView
Ranorex
IAR Compiler / IDE
HP Quality Center (or other Test Management Systems/Tools)
ClearQuest
Cockpit

226

Senior Verification Engineer Resume Examples & Samples

Understands and implements formal verification methods
Applicant should have efficient debugging and logic skills. Familiarity with major simulation and debug tool vendors is a plus
Low Power intent verification using CPF, UPF
Functional, Code Coverage methodologies

227

Principal Verification Engineer Resume Examples & Samples

Verification plan review
Verification test bench implementation
Understands functional coverage
In depth experience in functional verification and/or SoC integration is required
Experience with various emulation/accelerator methods and use-case environments is an additional benefit
AMBA bus protocols
Ability to work in a global project organization with project team distributed internationally

228

Performance Verification Engineer Resume Examples & Samples

Designing / developing performance tests (including performance benchmarks) with deep understanding how system works for complex advanced SOC components
BSEE; MSEE preferred with 10+ years of related experience
Assembly Language Programming skills, such as PPC and ARM v7, v8
MP Cache/memory subsystem of CPU core platform
VHDL/Verilog/System Verilog
OVM/UVM, Class based verification methodologies

229

Digital Verification Engineer UVM Resume Examples & Samples

Translation of functional requirements into verification plans
Perform digital verification on block and system level
Writing models for formal verification (UVM)
Creation of design documentation and specification

230

Formal Verification Engineer Resume Examples & Samples

Plan the formal verification strategy
Create properties and constraints for complex digital design blocks
Utilize formal property verification tools combined with formal verification closure techniques to verify properties
Resolve difficult problems to verify properties
Contribute improvements to methodologies to enhance formal verification results
Architect and implement reusable formal verification components
5+ years of ASIC / FPGA Verification Experience
Previous experience in capturing design specification in temporal assertion language such as SVA
Previous work experience in verification of designs such as CPUs, Networking blocks or Peripheral controllers
Master’s degree preferred with 5 years of ASIC / FPGA Verification Experience
Hands-on experience in using formal verification tools (Questa Formal, Jasper etc.)
Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust
Experience with high level verification methodologies like UVM, OVM, or VMM

231

SoC Verification Engineer Resume Examples & Samples

Verification test bench development eg drivers, monitors, response checkers, system Verilog assertions as well as use most advanced UVM VIPs
Strong skills in debug, failure re-creation and root cause analysis. Familiarity with major simulation and debug tool vendors is a plus
Ensure quality adherence during all stages of the project life cycle
In Depth experience on SOC/Chip level/Cluster/IP verification on multimillion Gate and complex Design with multiple clocks and power domains with minimal supervision
Experience and hands on working with C and UVM/System Verilog based Test environment, HDLs (Verilog/VHDL),PLI/DPI, simulators (IUS/Questa/VCS) is a MUST
Understanding of the design/architecture and ability to debug RTL/Gate netlist
Experience in microcontroller architecture, Cores ARM A/M/R series, Interconnect (NIC, FlexNoC), Cache Coherency, Protocols like AHB/AMBA,AXI, ACE, OCP, Memory(Flash, SRAM,DDR3/4) and memory controllers
Exposure to pre silicon validation/emulation (Palladium, Zebu)/FPGA Prototyping would be a big advantage

232

SoC Verification Engineer Resume Examples & Samples

Configure and verify complex IP and integrate into an effective subsystem
Design functional logic including chip level clock and reset controllers
Synthesize RTL to meet timing requirements and verify logical equivalency
Verifying SOCs and be comfortable using industry-standard processes and tools
Multiple experience levels from college to 10+ years
Less than 5% travel

233

Verification Engineer Resume Examples & Samples

Reviewing architecture specifications
Developing and implementing digital hardware verification test strategies
Developing UVM environments and test cases,
Implementing and analyzing functional coverage
Supporting post-silicon validation
Experience with digital design using hardware description languages (System Verilog, Verilog, VHDL)
Experience in testbench design for verifying complex computer hardware and software components
Experience with advanced simulators and debuggers (e.g. Questa, NCSim, VCS)
1 - 2 years of experience using UVM, OVM
Experience in FPGA prototyping
Experience with SystemC
Experience writing assertions

234

Verification Engineer Resume Examples & Samples

Demonstrate ownership for the assigned part of the project work, investigations and feasibility studies
2+ Years of engineering experience in CPU verification
Strong understanding of basic computer architecture and latest advances in the area of Multicores, Virtualization etc
Familiar with verification best practices such as Test Plan development, Testcase development
Familiarity of Unix / Linux working environment
Familiarity with ARM architecture/CPU architectures and verification

235

Lead Verification Engineer Resume Examples & Samples

Develop and execute coverage-driven verification test plans
Develop test suites for full chip and block level verification
Develop System Verilog, UMM test bench environment
Leverage your knowledge of constrained assertion based verification
Manage the regressions and analyze functional and code coverage metrics to fill the coverage holes
Reviewing and critiquing of peers verification plan & env
Add automation and scripting wherever applicable in the chip design flow
Proactively identifying new methodologies or tools to address an upcoming verification challenges

236

Component Verification Engineer Resume Examples & Samples

Be responsible for the definition and generation of verification plans as well as to support system tests and customer requests
Be responsible for the documentation of your results and presentation to the development team
Develop innovative approaches for lab setup automation, foster reuseand develop new methodologies to reduce verification time

237

RF Component Verification Engineer Resume Examples & Samples

Development of post silicon verification test plans in order to meet schedules
Support preparation of the complete test suite RF measurement setup, chip control sequences, PCB design
Conduct performance & debug tests autonomously
Bring up of TX architecture in laboratory, pro-active interacting with other engineering teams required like system, circuit design, software, firmware
Analyzation & root-cause-identification for issues encountered during tests. In the following elaborating ideas in team for possible HW/SW solutions or workarounds
Prepare overviews and present status
Master in Telecommunication engineering
In depth knowledge of analog RF fundamentals and RF cross effects in TX blocks mixer, amplifier, DACs
Candidate should have worked in RF laboratory environment before
Proven record in usage with RF laboratory equipment SA, NWA, Power Meter
Programming skills: Expert in MATLAB Script Language / C ++ basic skills

238

Electronics Verification Engineer Resume Examples & Samples

Review and Understand System Requirement Spec
Develop System Verification Plan from system requirement spec
Ownership of verification, test development and execution
Follow test process and continuously identify the waste effort in order to improve the process efficiency
Execute the test plans
Create test reports with the good amount of data
Bachelor / Master / Electronic Engineering / Robotic & Automation Engineering, or related fields
At least more than 2 years of experience in software / hardware verification, black box testing, system integration testing
Preferably personnel specializing in Engineering, particularly in “Electronics” environment is a plus
Experience in LabView & NI instrument application is a MUST
Experience in robotic home appliance will be advantage
Possess a good understanding of electronics/power electronics circuitry and electronic hardware design
Posses a good understanding of statistical tools. Knowledge in DFSS would be an advantage
Able to create verification test plan according the design requirements for both electronic hardware and software
Able to perform root cause analysis, risk/failure assessment to ensure products meet its reliabilities

239

Senior Electronics Verification Engineer Resume Examples & Samples

Guide and supervise engineer in verification activities according to SEA Electronic standard process
Feedback verification result to category and function team
Develop System Validation Plan from system requirement spec for new project
Review the Verification plan with cross functional engineers to define the limits and pass fail criteria
Review the Validation plan with Reliability lead to define the limits and pass fail criteria
Create Investigative test plans and review with cross functional team
Make sure all the system requirements are verifiable either by quantitative or by qualitative measurements
At least more than 5 years of working experience in software / hardware verification, black box testing, SIL, HIL,ATE & system integration testing
Experience in LabView application & NI instruments is a MUST
Possess a good understanding of statistical tools. Knowledge in DFSS would be an advantage
Able to understand the C/C++, assembly language, debug emulation, simulation tools of different chipsets
Experience in HALT/HASS/MEOST test is a plus
Experience in mobile apps, WiFI, sensor test and verification is a plus
Innovative problem solver willing to search for creative

240

SoC Verification Engineer Resume Examples & Samples

Understands Develop functional coverage
Ensure quality adherence during all stages of the project life cycle. Also carry out a thorough analysis of existing processes and recommend and implement the process improvements to ensure ‘Zero Defect’ chips
Apply technical leadership, coordinate and supervise local engineers, off-site teams and subcontractors who provide verification solutions for our products

241

Senior Verification Engineer Resume Examples & Samples

Develop C++ reference models of hardware blocks for functional verification of RTL
Develop testbenches, reusable verification components (e.g. BFMs, scoreboards) for functional verification
Create functional verification plans
Working closely with RTL designers to specify, develop and debug constrained-random and directed testcases towards coverage driven verification closure
Develop/maintain simulation flow
Highly experienced in both block-level and system-level verification
Expert-level C++ and SystemC modeling experience
Strong Unix and scripting experience - Perl, Python, TCL, bash, c-shell
Expert-level knowledge of SystemVerilog
High degree of comfort working in a verification environment that uses UVM and other methodologies
Hardware/software co-simulation, with experience of C-driven testing
Prior verification planning & execution experience in all of the following
Conducting detailed reviews of design specs
Preparing detailed verification plans
Developing, testing, and integrating C++/SystemC models
Developing verification components
Executing metric-driven functional verification using random stimulus coupled with covergroups and SystemVerilog Assertions
The candidate must demonstrate significant prior hands-on contribution to the verification of complex designs that led to successful silicon
The successful candidate needs to be highly pro-active, and be willing to help address whatever design and verification issues arise
Some appreciation of digital signal processing and finite precision arithmetic (word growth, rounding etc.)
Prior verification experience with serial interfaces such as USB, PCIE, I2C, I2S, SPI etc

242

Verification Engineer Resume Examples & Samples

Writing verification plan through collaborations with architects, logic designers, marketing and stakeholders
Testbench development
Deployment/development for internal/external VIPs and EDA tools/technologies
Ensuring verification plan completion on all desired metrics: testcases/scenarios, code/functional coverage and more
Debugging fails, root causing bugs and ensuring bug-free design prior to tape out
Gate verification
Supporting silicon bring up issues and customer incidences
Minimum of 5 years of industry related experience
Minimum BSEE/BSCE/BSCS. MSEE/MSCE/MSCS a plus

243

Verification Engineer Resume Examples & Samples

Review of architecture and design documents
Development of verification plans
Development and support of Verification IPs (VIP)
Testbench development using SV and UVM
Development of constrained random tests
Test regressions, coverage analysis and reporting
Scripting using Perl, Tcl
BSEE with 1 to 2 years of experience
Strong understanding of Digital VLSI design principle
System Verilog, Verilog, C, Perl, Tcl, languages
UVM verification methodology
Cadence and Mentor RTL simulation toolset
Linux/Unix, SVN, Environment Modules

244

Principal Logic Verification Engineer Resume Examples & Samples

Good understanding of ASIC verification concepts and techniques
Ability to develop verification architecture documents for complex modules/systems
Ability to architect complex module / sub system test benches and build verification infrastructure
Very good knowledge of Verilog/System Verilog and UVM
Should be a good mentor and guide for junior engineers in the team
Experience is project planning, resource allocation, scheduling and status reporting
Excellent communication skills and interpersonal skills
BSEE, BSCS, or related discipline. MS a plus

245

Principal Verification Engineer Resume Examples & Samples

Work with the verification team to develop reusable UVM verification platform
Develop verification plan, testbench, and stimuli, and maintain those
Run simulations, debug, and close coverage goals
Work with digital design engineers for chip integration and debug
Work with analog design engineers for real number models integration and debug
Generate a lot of writing as record in bug tracking system as well as documentation
Verification flow with UVM, SystemVerilog, and Verilog
Analog Mixed Signal (AMS) verification with Real Number Modeling
Seamless integration between block level and chip level testbench
Script based automation (shell, python)
High-level programming concept, such as OOP, TLM
Industry standard protocols, such as AMBA (AHB/APB), I2C, SPI, UART, SMPI, SMBUS
Interrupt driven microcontroller behavior with ARM Cortex-M
Embedded firmware programming with C/C++
Interpret specifications and implement as described

246

Digital Verification Engineer Resume Examples & Samples

Work within a UVM System Verilog environment to develop tests achieving high coverage vs. specification and anticipated use cases
Work closely with digital and analog power design engineers
Track bugs in Jira and maintain spec. traceability
Support validation of the DUT in the lab
Debug and solve complex problems that may be the test bench or the DUT
Communicate weekly progress to team and mgmt
5+ years digital verification experience
System Verilog and UVM
Understanding of microcontroller core based product architectures
Experience designing or verifying mixed signal SoC
Bachelor of Science in Electrical Engineering or Computer Science minimum
Full product development experience: specification, architecture, logic design, firmware, verification, design for test, synthesis, place and route, lab evaluation, and production ATE testing
C and/or Python
Exposure to ISO26262 Automotive Safety product development or verification
FPGA prototyping

247

Verification Engineer Resume Examples & Samples

Develop test plans and coverage metrics from specifications, write block and chip-level tests, and execute the test plans from start to finish
Debug RTL and Gate simulations and work with HW and SW development teams to verify fixes
Experience with development of UVM and/or System Verilog, Verilog test benches and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES
Ability to create simple tests for verification in C/C++
Good problem solving skills and ability to analyze and debug RTL design issues
Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management is a plus
Knowledge of protocols like AXI, APB, DDR4, Processors is a plus
Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (Magellan) is a plus
Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus

248

Verification Engineer Resume Examples & Samples

Evaluation, characterization and verification of medical devices for combination products and primary container (e.g., pre-filled syringe, vials, cartridges, new technology, special packaging)
Practical evaluation of new and breakthrough technologies
Development and Validation of new test methods
Implementation of new lab testing equipment
Generation of plans, protocols, reports as required
Coordination and execution of experimental, verification, complaint investigation and change evaluation testing
Liaison and provide technical support to key customers in clinical and commercial phases - such as filling, assembly and packaging operations, packaging and quality groups, regulatory, process and formulation development groups, supply chain
Support to Technology Transfer of combination products and medical devices into commercial facilities/packaging centers (specification/method/equipment transfer)

249

Senior Verification Engineer Resume Examples & Samples

Requires Bachelor’s degree in ME, EE, IE, OE, BME, CE or other relevant field with 8+ years of experience in the design, development and manufacturing of a product (device, part, component, etc.), preferably in the medical device industry
Pressure Guide Wire and IVUS catheter or equivalent disposable medical device experience, especially skilled in design control process and deliverables
Must be able to read/write and speak English
Strong technical writing skills for generation of specifications, build method, work instructions, technical protocols and reports
Strong communication skills both written and verbal to provide updates and feedback to management and team members
Exercises judgment in selecting methods, techniques and evaluation criteria for obtaining results. Use data to drive decisions
Product transfer experience with strong understanding of product transfers from R&D to high volume manufacturing
Proficient with Microsoft Office products (Outlook, Excel, PowerPoint, Word, Visio, Project) to create schedules, presentations, graphs and charts and doing analysis
Demonstrates strong organizational and interpersonal skills working in a cross-functional, regulated environment
Proficient with additional software packages as required such as statistics software
Knowledge of testing methods at all levels (unit, integration, system, V&V, acceptance) applied within the development lifecycle
Test automation experience is a plus
Previous work experience on medical device in FDA regulated industry is a plus
May Supervise 1-2 employees, but not primary responsibility
Provides guidance and training to production operators
Pressure Guide Wire, Catheter or related technology experience
Solidworks/ CAD (Drawings understanding)
Requirement and test management tools (such as Doors, HPALM)

250

Verification Engineer Resume Examples & Samples

Experience in planning, testes writing and tests methodology
Ability to complete assigned responsibilities independently and on time
Experience in automation at the script level
Experience as a verification engineer in Medical device– advantage
Experience in working with off shore units – an advantage

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Verification Engineer Resume Samples

The Guide To Resume Tailoring

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